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This chapter is from the book

This chapter is from the book

1.5 The FPGA as an Embedded Software Platform

Because of their reprogrammability, designing for FPGAs is conceptually similar to designing for common embedded processors. Simulation tools can be used to debug and verify the functionality of an application prior to actually programming a physical device, and there are tools readily available from FPGA vendors for performing in-system debugging. Although the tools are more complex and design processing times are substantially longer (it can take literally hours to process a large application through the FPGA place-and-route process), the basic design flow can be viewed as one of software rather than hardware development.

Figure 1.3

Figure 1-3. By introducing software-to-hardware compilation into the design process, it’s possible to get to a working prototype faster, with more time available for later design refinement.

As any experienced FPGA application designer will tell you, however, the skills required to make the most efficient use of FPGAs, with all their low-level peculiarities and vendor-specific architectural features, are quite specialized and often daunting. To put this in the proper perspective, however, it’s important to keep in mind that software development for embedded processors such as DSPs can also require specialized knowledge. DSP programmers, in fact, often resort to assembly language in order to obtain the highest possible performance and use C programming only in the application prototyping phase. The trend for both FPGA and processor application design has been to allow engineers to more quickly implement applications, or application prototypes, without the need to understand all the intricate details of the target, while at the same time providing access (through custom instructions, built-in functions/macros, assembly languages, and hardware description languages as appropriate) to low-level features for the purpose of extracting the maximum possible performance.

The Impulse C toolset used extensively in the book represents a relatively simple, C-based approach to hardware/software partitioning and hardware/software process synchronization that is coupled with efficient, FPGA-specific hardware compilers to produce a complete design path for mixed processor and FPGA implementations. This design flow has been integrated into traditional embedded and desktop programming tool flows without the need for custom behavioral simulators or other EDA-centric technologies. The combined environment enables systems-oriented development of highly parallel applications for FPGA-based platforms using the familiar C language, which may or may not be combined with existing HDL methods of design for those parts of an application that are not naturally expressed as software.

One of the key attributes of such a software-oriented system design flow is the ability to implement a design specification, captured in software, in the most appropriate platform resource. If the most appropriate resource is a microprocessor, this should be a simple matter of cross-compiling to that particular processor. If, however, the best-fitting resource is an FPGA, traditional flows would require a complete rewrite of the design into register transfer level (RTL) hardware description language. This is not only time-consuming, but also error-prone and acts as a significant barrier to the designer in exploring the entire hardware/software solution space. With a software-oriented flow, the design can simply be modified in its original language, no matter which resource is targeted.

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