- Properties of IMC
- IMC Designs for No Disturbance Lag
- Design for Processes with No Zeros Near the Imaginary Axis or in the Right Half of the s-Plane
- Design for Processes with Zeros Near the Imaginary Axis
- Design for Processes with Right Half Plane Zeros
- Problems with Mathematically Optimal Controllers
- Modifying the Process to Improve Control System Performance
- Software Tools for IMC Design
3.3 IMC Designs for No Disturbance Lag
This section discusses the case where the disturbance lag pd(s) (c.f. Figure 3.2) is unity. For design methods when the disturbance lag is not one, see Chapter 4. The discussion begins by considering a process modeled by a first-order lag plus deadtime. Such models approximate the behavior of many chemical and petroleum processes. Since in this section we always assume that the model is perfect, we shall suppress the tilde notation.
Example 3.1 IMC Controller for an FOPDT Process
The inverse of the process p(s) given in Eq. (3.9) is
The only term in Eq. (3.10) that can be realized (i.e., be physically constructed) directly in a controller is the inverse of the process gain K. The term eTs represents an unrealizable prediction of future outputs,1 while the term (τs+1) requires an unrealizable pure (i.e., unfiltered) differentiation of the process output. A real-time unfiltered differentiation of a continuous time signal is not realizable,2 and even if it were, it would not be implemented because of unacceptable amplification of the noise on the measured process output y. Thus the best3 that can be done is to implement the controller q(s) for the process given by Eq. (3.9) as
where = a filter time constant or tuning parameter chosen to avoid excessive noise amplification and to accommodate modeling errors.
For modest or small modeling errors, the filter time constant will be less than the process time constant τ and the controller q(s), given by Eq. (3.11), will be a lead network. That is, the frequency response of the controller will show that its magnitude increases from 1/|K| at low frequencies to τ/|K| at high frequencies, while the phase angle goes from zero at low frequencies to tan-1 τ/ at high frequencies (tan-1 τ/ approaches 90° as approaches zero).
The time response of y, given by Eq. (3.12), to a unit step change in setpoint r is shown in Figure 3.3 for T = 1 and = .05 and 1.0.
Figure 3.3. Perfect model IMC step response for first-order lag plus dead time.
The choice of the filter parameter in Eq. (3.12) depends on the allowable noise amplification by the controller and on modeling errors. Methods for choosing the filter time constant to accommodate modeling errors are discussed in Chapter 7. To avoid excessive noise amplification, we recommend that the filter parameter be chosen so that the high frequency gain of the controller is not more than 20 times its low frequency gain. For controllers that are ratios of polynomials, this criterion can be expressed as
The criterion given by Eq. (3.13) arises from the standard industrial practice of limiting the high frequency gain of a PID controller to no more than 20 times the low frequency controller gain, which is usually referred to simply as the controller gain (see Appendix A).
Factors of 5 and 10 are also frequently encountered in practice. While Eq. (3.13) limits only the infinite frequency gain of the controller, the complete design methodology presented later in this section limits the gain to less than 20 over all frequencies.
The controller design method for the first order lag and dead time process generalizes easily to processes of the form
where N(s) and D(s) are polynomials in s.
The design of IMC controllers for Eq. (3.14) depends mainly on the characteristics of N(s), as discussed in the following sections.