- Server Chipsets Overview
- Criteria for Real-World Server Chipsets
- Intel Pentium Pro/II/III Chipsets for Servers
- Intel Pentium 4 Chipsets for Single-Processor Servers
- Intel Xeon DP and Xeon MP Chipsets
- Intel Itanium and Itanium 2 Chipsets
- Broadcom ServerWorks Chipsets for Intel Processors
- Other Third-Party Server Chipsets for Intel Processors
- AMD Athlon MP and Opteron Server-Class Chipsets
- Determining Hardware Compatibility with Server Platforms
- Conclusions, Troubleshooting, and Documentation
AMD Athlon MP and Opteron Server-Class Chipsets
The original AMD Athlon Slot A processor was not commonly used in servers for two reasons:
- It was never certified for SMP (dual-processor) operation
- There were no dual-processor chipsets that supported the processor.
However, after the Athlon design was shifted to Socket 462 (also known as Socket A), AMD developed an SMP-compatible version of the processor known as the Athlon MP. This processor was supported by AMD's AMD-760MP chipset, which was the first major chipset on the market to support DDR SDRAM memory.
However, development of server-class chipsets for AMD processors didn't become widespread until the development of the AMD Opteron, the first 64-bit processor capable of also running existing 32-bit IA-32 applications at full speed. Both AMD and third-party chipmakers have developed a number of chipsets for the Opteron. Unlike the most powerful chipsets made for Intel processors, which are almost always limited to preconfigured servers from major vendors, motherboards built for Opteron processors are widely available for "build-your-own" server builders.
The following sections discuss the various server-class chipsets available for AMD processors in greater detail.
The AMD-760 Family of Chipsets
The AMD-760 chipset, introduced in October 2000, is notable as the first chipset to support DDR SDRAM memory. The AMD-760 chipset consists of the AMD-761 system controller (North Bridge) in a 569-pin plastic ball-grid array (PBGA) package and the AMD-766 peripheral bus controller (South Bridge) in a 272-pin PBGA package.
The AMD-761 North Bridge features the AMD Athlon system bus, DDR-SDRAM system memory controller with support for either PC1600 or PC2100 memory, AGP 4x controller, and PCI bus controller. The 761 allows for 200MHz or 266MHz processor bus operation and supports the newer Athlon chips that use the 266MHz processor bus (also called the FSB).
The AMD-766 South Bridge includes a USB controller, dual UDMA/100 ATA/IDE interfaces, and the LPC bus for interfacing newer Super I/O and ROM BIOS components.
The AMD-760 chipset includes the following features:
- AMD Athlon 200/266MHz processor bus
- Dual-processor support
- PCI 2.2 bus with up to six masters
- AGP 2.0 interface that supports 4x mode
- PC1600 or PC2100 DDR SDRAM with ECC
- Support for a maximum of 2GB buffered or 4GB registered DDR SDRAM
- ACPI power management
- ATA-100 support
- USB controller
- LPC bus for Super I/O support
The AMD-760MP chipset, which uses the AMD-762 North Bridge chip, is a development of the basic AMD-760 design that supports dual-processor Athlon MP systems. It differs from the standard 760 chipset in the following ways:
- Supports dual AMD Athlon MP processors with 200/266MHz processor bus speeds
- Supports up to 4GB PC2100 DDR (registered modules)
- Supports 33MHz PCI slots in 32-bit and 64-bit widths
The AMD-760MPX chipset uses the same AMD-762 North Bridge chip as the AMD-760MP to support multiple Athlon MP processors, but it uses the AMD-768 peripheral bus controller (South Bridge) chip. It differs from the 760MP chipset in the following ways:
- The AMD-762 North Bridge chip is used to support two 66MHz 32/64-bit PCI slots.
- The AMD-768 South Bridge chip is used to support 33MHz/32-bit PCI slots.
The 760MPX chipset is a better choice for a server because of its support for 66MHz and 64-bit PCI slots, whereas the 760MP is a suitable choice for a workstation.
Figure 3.37 illustrates the 760MPX's architecture.
Figure 3.37 AMD-760MPX chipset block diagram.
The 760MP and 760MPX chipsets continue to be popular choices for AMD-based workstations and servers that use the Athlon MP processor.
AMD Opteron Chipsets
The AMD Opteron is unique among x86-compatible server processors in having an integrated memory controller. Servers based on the Opteron can be scaled from single-processor to eight-way servers without ever needing any type of specialized memory controller or cache coherence controller. The integrated memory controller in the Opteron supports registered DDR memory, including ECC memory. By integrating the memory controller in the processor, AMD has made it possible for chipset vendors to produce simpler chipsets for Opteron than for earlier AMD-based or Intel-based servers.
The Opteron also features a HyperTransport bus between components. HyperTransport is a high-speed point-to-point interface somewhat similar to the Intel Hub Architecture discussed earlier in this chapter.
See "HyperTransport," p. 155.
Because the Opteron contains integrated memory controllers, it's possible to build a server that contains only an ICH (South Bridge) chip in its chipset. Also, the use of HyperTransport interconnects enables chips from different vendors to be combined in a variety of ways to create a specific motherboard design. Therefore, Table 3.21 is broken down into chipset component categories. For additional details, see the sections that follow Table 3.21.
Table 3.21. Chipset Logic for Opteron Server PlatformsView Table
An Opteron-based system can combine various brands of chips together into a customized solution. For example, a server can use the NVIDIA nForce Professional 2200 along with an AMD 8131 or 8132 PCI-X bridge to support PCI-Express, PCI-X, and PCI cards.
Depending upon the features of a system I/O controller, it can be used by itself to create a motherboard. For example, the nForce Professional 2200, the AMD 8111, or the ServerWorks HT1000 can be used to provide disk, legacy ports, and PCI support.
This ability to mix and match chipset products from various vendors is not exactly new. Vendors such as ULi (formerly Acer Labs) have long produced South Bridge chips compatible with various vendors' North Bridge chips. However, because of the combination of a common industry standard (HyperTransport) for chip interconnects and the location of the memory controllers in the Opteron processors, Opteron-based systems provide unparalleled flexibility in motherboard chipset design. The AMD-8000, nForce Professional, and ServerWorks HT-2000/HT-1000 chipsets are all popular choices for Opteron-based servers and server motherboards.
The AMD 8000 Chipset
The AMD 8000 is AMD's first chipset designed for the Athlon 64 and Opteron families. Its architecture is substantially different from the North Bridge/South Bridge or hub-based architectures we are familiar with from the chipsets designed to support Pentium II/III/4/Celeron and AMD Athlon/Athlon XP/Duron processors.
The AMD-8000 chipset is sometimes referred to as the AMD-8151 because the AMD-8151 provides the connection between the Athlon 64 or Opteron processor and the AGP video slot, the task normally performed by the North Bridge or MCH hub in other chipsets. The name of the North Bridge or MCH hub chip is usually applied to the chipset. However, AMD refers to the AMD-8151 chip as the AGP Graphics tunnel chip because its only task is to provide a high-speed connection to the AGP slot on the motherboard. Consequently, the AMD-8151 is usually not used on Opteron motherboards used for servers. The other components of the AMD-8000 chipset include the AMD-8111 HyperTransport I/O hub (South Bridge), the AMD-8131 PCI-X tunnel chip, and the AMD-8132 PCI-X 2.0 tunnel chip.
The AMD-8151 AGP Graphics tunnel chip has the following major features:
- Support for AGP 2.0/3.0 (AGP 1x–8x) graphics cards
- 16-bit up/down HyperTransport connection to the processor
- 8-bit up/down HyperTransport connection to downstream chips
The AMD-8111 HyperTransport I/O hub (South Bridge) chip's major features include the following:
- PCI 2.2–compliant PCI bus (32-bit, 33MHz) for up to eight devices
- AC '97 2.2 audio (six-channel)
- Six USB 1.1/2.0 ports (three controllers)
- Two ATA/IDE host adapters supporting up to ATA-133 speeds
- LPC bus
- Integrated 10/100 Ethernet
- 8-bit up/down HyperTransport connection to upstream chips
The AMD-8131 HyperTransport PCI-X tunnel chip's major features include the following:
- Two PCI-X bridges (A & B) supporting up to five PCI bus masters each
- PCI-X transfer rates up to 133MHz
- PCI 2.2 33MHz and 66MHz transfer rates
- Independent operational modes and transfer rates for each bridge
- 8-bit up/down HyperTransport connection to upstream and downstream chips
The newest member of the AMD 8000 chipset family, the AMD-8132 PCI-X 2.0 tunnel chip, offers PCI-X 2.0 transfer rates up to 266MHz. Other features are similar to those of the AMD-8131.
Figure 3.38 shows the architecture of the AMD 8000 chipset in a typical two-way server implementation.
Figure 3.38 Block diagram of the AMD 8000 chipset in a typical server implementation.
The NVIDIA nForce Professional 2000 Series of Chipsets
NVIDIA is no stranger to the AMD Opteron and AMD Athlon 64 processors: Its nForce 3–series chipsets for the AMD Athlon 64 are among the most popular and best-performing chipsets available. However, NVIDIA did not release its first chipsets optimized for Opteron-based servers, the nForce Professional 2000 series, until January 2005.
Like other recent nForce chipsets, the nForce Professional chipsets feature a highly integrated single-chip design. The initial offerings include the following:
- nForce Professional 2200
- nForce Professional 2050
Both chipsets feature the following:
- HyperTransport connections to Opteron processors and other components
- SATA RAID 0, 1, and 0+1
- Native Gigabit Ethernet with hardware firewall
- Support for up to eight-way or higher implementations
- Support for dual-core Opteron processors
- Second-generation SATA (3GBps)
The 2200 also features support for up to 10 USB 2.0 ports, 20 flexible PCI-Express lanes, 8-channel AC '97 audio, ATA-133, and a 33MHz, 32-bit PCI interface. The 2200's implementation of RAID can include both SATA and ATA/IDE drives in the same array. The 2050 lacks USB, PCI, and ATA-133 support; supports an x16 PCI-Express slot and four x1 slots; and does not have onboard audio.
Although neither the 2200 nor 2050 chipsets support PCI-X slots natively, they support connections to other Opteron-compatible chipset components via HyperTransport. As a result, some vendors have combined the AMD 8131 or 8132 chips with the 2200 or 2050 chips to produce systems with PCI-X support.
The ServerWorks HT Series of Chipsets
Broadcom's ServerWorks division released its first logic chips for Opteron systems, the HT-2000 and HT-1000, in April 2005. The HT-2000 I/O controller combines support for two PCI-X slots or integrated devices, a two-port Gigabit Ethernet controller, and 17-lane PCI-Express support (with up to four PCIe controllers) in a single chip. The HT-2000 provides 16x HyperTransport upstream connections at up to 2GHz to the host and 8x HyperTransport downstream connections at up to 1.6GHz to the HT-1000 I/O controller or other chips. A single HT-2000 chip supports up to two Opteron processors. A four-way platform uses two HT-2000 chips, and an eight-way platform uses four HT-2000 chips. With any number of HT-2000, a single HT-1000 I/O controller is used to provide support for other components.
The companion HT-1000 controller supports two PCI-X slots, as well as 32-bit PCI slots; USB 2.0 ports; one ATA/IDE and up to four SATA drives; SATA RAID levels 0, 1, 0+1, and 5; and an LPC bus. Because of its versatile design, the HT-1000 I/O controller can also be used by itself for entry-level two-way servers, providing an 8x HyperTransport connection to the host.
Figure 3.39 illustrates an advanced two-way configuration using the HT-2000 and HT-1000 and a basic two-way configuration using the HT-1000 by itself.
Figure 3.39 Block diagram of the ServerWorks HT-2000/HT-1000 chipset in typical advanced (left) and basic (right) two-way server implementations.