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This chapter is from the book

This chapter is from the book

Criteria for Real-World Server Chipsets

Let's examine the leading chipsets used in servers, starting with those used in Pentium Pro–based servers and working all the way through to the latest Xeon, Itanium, Athlon MP, and Opteron chipsets.

In the following sections, the chipsets discussed in detail meet the following real-world server criteria:

  • Chipsets that are designed for processors other than the Pentium 4, Pentium D, and Pentium Extreme Edition (which do not support symmetric multiprocessing [SMP]) must support SMP (two or more processors).
  • All chipsets, at least, support parity-checked memory or, preferably, ECC memory. Although some vendors sell server motherboards or systems that use chipsets that lack parity or ECC support, you can't consider such systems to be true servers. Because a server is called on to provide mission-critical information to the organization, you need to use technology in your server that ensures that data is reliable.
  • Both server and workstation chipsets are discussed because many so-called workstation chipsets are also used in entry-level server installations.

This is the simplest way to summarize what makes a server chipset: If it acts like a server chipset and has been (or can be) used as a server chipset by Intel or a third-party motherboard or system vendor, it is a server chipset.

Comparison of System and Component Bus Speeds

The system chipset is the conductor that controls the orchestra of system components, enabling each to have its turn on its respective bus. Table 3.4 shows the widths, speeds, data cycles, and overall bandwidth of virtually all PC buses.

Table 3.4. Bandwidth and Detailed Comparison of Most PC Buses and Interfaces [1]

View Table

Note that many of the buses use multiple data cycles (transfers) per clock cycle to achieve greater performance. Therefore, the data transfer rate is higher than it would seem for a given clock rate, which provides an easy way to make an existing bus go faster in a backward-compatible way.

The Processor Bus

The processor bus (also called the FSB) is the communication pathway between the CPU and the motherboard chipset (specifically, the North Bridge or MCH). This bus runs at the full motherboard speed—typically between 200MHz and 800MHz in modern systems, depending on the particular board and chipset design.

Most recent one- or two-way servers use bus designs similar to those shown in Figures 3.5 and 3.6. Figure 3.6 shows the bus design for a typical dual-processor Intel Xeon server running at 800MHz CPU (FSB) using the E7525 chipset.


Figure 3.6 A typical bus design for a recent two-way server based on the Intel Xeon processor.

A system running an AMD Opteron processor has a different bus design from the one shown in Figure 3.6:

  • The Opteron uses an integrated dual-channel DDR memory controller rather than the traditional North Bridge/MCP design shown in Figure 3.6.
  • The Opteron uses three HyperTransport tunnels to carry traffic between the processor and the chipset. Compare Figures 3.5 and 3.6 to get a better sense of these differences.

Because the purpose of the processor bus is to get information to and from the CPU at the fastest possible speed, this bus typically operates at faster than any other bus in the system. The bus consists of electrical circuits for data, addresses (the address bus, which is discussed in the following section), and control purposes. Most processors since the original Pentium have a 64-bit data bus, so they transfer 64 bits (8 bytes) at a time over the CPU bus.

The processor bus operates at the same base clock rate as the CPU does externally. This can be misleading because most CPUs these days run at a higher clock rate internally than they do externally. For example, an AMD Athlon 64 3800+ system has a processor that runs at 2.4GHz internally but only 400MHz externally, whereas a Pentium 4 3.4GHz runs at 3.4GHz internally but only 800MHz externally. In newer systems, the actual processor speed is some multiple (2x, 2.5x, 3x, and higher) of the processor bus.

The processor (FSB) speeds are largely governed by the speed of memory. While memory speeds have increased since the first x86 PCs were introduced 25 years ago, internal processor speeds have gone up by a much higher rate.


See "x86 Processor Speed Ratings," p. 55.


See "Memory Types Overview," p. 359.

The processor bus is tied to the external processor pin connections and can transfer 1 bit of data per data line every cycle. Most modern processors transfer 64 bits (8 bytes) of data at a time.

To determine the transfer rate for the processor bus, you multiply the data bus width (64 bits or 8 bytes for a Pentium III/4 or Xeon or Athlon MP/Athlon 64) by the clock speed of the bus (the same as the base or unmultiplied clock speed of the CPU). For example, if you are using a Xeon 3.6GHz processor that runs on an 800MHz processor bus, you have a maximum instantaneous transfer rate of roughly 6400MBps. You get this result by using the following formula:

800MHz x 8 bytes (64 bits) = 6400MBps

With slower versions of the Xeon, you get either this:

533.33MHz x 8 bytes (64 bits) = 4266MBps

or this:

400MHz x 8 bytes (64 bits) = 3200MBps

With Socket A (Athlon MP), you get this:

333.33MHz x 8 bytes (64 bits) = 2667MBps

or this:

266.66MHz x 8 bytes (64 bits) = 2133MBps

or this:

200MHz x 8 bytes (64 bits) = 1600MBps

With Slot 2 (Pentium III Xeon), you get this:

133.33MHz x 8 bytes (64 bits) = 1066MBps

or this:

100MHz x 8 bytes (64 bits) = 800MBps

This transfer rate, often called the bandwidth, of the processor bus represents the maximum speed at which data can move. Refer to Table 3.4 for a more complete list of various processor bus bandwidths.

The Memory Bus

The memory bus is used to transfer information between the CPU and main memory—the RAM in the system. This bus is connected to the motherboard chipset North Bridge or MCH chip in most server designs. (AMD Opteron processors incorporate the memory controller.) Depending on the type of memory the chipset (and therefore motherboard) is designed to handle, the North Bridge runs the memory bus at various speeds. The best solution is if the memory bus runs at the same speed as the processor bus. Systems that use PC133 SDRAM have a memory bandwidth of 1066MBps, which is the same as the 133MHz CPU bus. Pentium 4 or Xeon systems with the 533MHz bus run dual-channel DDR PC2100 or PC2700 modules, which match or exceed the throughput of the 4266MBps processor bus.

Running memory at the same speed as the processor bus means you don't need to have cache memory on the motherboard.

The SCSI Bus

Although hardly any PCs have integrated SCSI ports, many servers have one or more integrated SCSI ports. SCSI (pronounced "scuzzy") is a general-purpose interface with its roots in SASI (Shugart Associates System Interface). SCSI is a popular interface for attaching high-speed disk drives, RAID arrays, and tape drives to high-end network servers. SCSI is a bus that supports as many as 7 or 15 total devices. Multichannel adapters exist that can support up to 7 or 15 devices per channel.

For more information about SCSI devices and configuration, see Chapter 7, "The SCSI Bus."

About Intel Chipsets

You can't talk about server chipsets today without discussing Intel because the company currently owns the vast majority of the Intel server processor chipset market. It is interesting to note that we probably have Compaq (now part of Hewlett-Packard) to thank for forcing Intel into the chipset business in the first place!

The event that really started it all was the introduction of the EISA bus that Compaq designed in 1989. At that time, Compaq had shared the EISA bus with other manufacturers in an attempt to make it a market standard. However, Compaq refused to share its EISA bus chipset—a set of custom chips necessary to implement this bus on a motherboard.

Intel decided to fill the chipset void for the rest of the PC manufacturers wanting to build EISA bus motherboards. As is well known today, the EISA bus only found short-term market support as part of a niche server business in the early 1990s, but ultimately it failed to become a market success. This opened the door for Intel, which now had a taste of the chipset business that it apparently wouldn't forget.

With the introduction of the 286 and 386 processors, Intel became impatient with how long it took the other chipset companies to create chipsets around its new processor designs; this delayed the introduction of motherboards that supported the new processors. For example, it took more than two years after the 286 processor was introduced for the first 286 motherboards to appear and just over a year after the 386 had been introduced for the first 386 motherboards to appear. Intel couldn't sell its processors in volume until other manufacturers made motherboards that would support them, so it thought that by developing motherboard chipsets for a new processor in parallel with the new processor, it could jumpstart the motherboard business by providing ready-made chipsets for the motherboard manufacturers to use.

After introducing the 420 series chipsets along with its 486 processor in April 1989, Intel realized it controlled over 90% of the components on a typical motherboard because it made both processors and chipsets. What better way to ensure that motherboards were available for its Pentium processor when it was introduced than by making its own motherboards as well and having these boards ready on the new processor's introduction date?

When the first Pentium processor debuted in 1993, Intel also debuted the 430LX chipset, as well as a fully finished motherboard. Now, besides the chipset companies being upset, the motherboard companies weren't too happy, either. Intel was not only the major supplier of parts needed to build finished boards (processors and chipsets) but was now building and selling the finished boards as well. By 1994, Intel dominated the processor and chipset markets for desktop PCs. By the late 1990s, through a combination of internally developed chipsets and shrewd acquisitions, such as Intel's purchase of Corollary, the original developer of Intel's Profusion 8-way chipset, Intel also dominated the processor and chipset markets for entry-level dual and four-way servers.

Now as Intel develops new processors, it develops chipsets and motherboards simultaneously, which means they can be announced and shipped in unison. This eliminates the delay between introducing new processors and waiting for motherboards and systems capable of using them, which was common in the industry's early days.

Starting with the 486 in 1989, Intel began a pattern of numbering its chipsets as shown in Table 3.5.

Table 3.5. Intel Chipset Model Numbers

Chipset Number

Processor Family Supported


P4 (486)


P5 (Pentium) North Bridge/South Bridge architecture


P6 (Pentium Pro/PII/PIII) North Bridge/South Bridge architecture


P6/P7 (PII/PIII/P4) with hub architecture


P7 (Pentium 4, Pentium D) with hub architecture and PCI-Express


P6 server (Pentium Pro/PII Xeon/PIII Xeon)


Xeon MP server


Xeon DP workstation or server with hub architecture


Xeon DP server with hub architecture


Xeon DP workstation or server with hub architecture


Xeon MP server with hub architecture and PCI-Express


Itanium processor


Itanium 2 processor with hub architecture

The chipset numbers listed in Table 3.5 are abbreviations of the actual chipset numbers stamped on the individual chips. For example, the 945G chipset supports the Pentium D and Pentium 4 and consists of two main parts: the 82945G Graphics MCH (GMCH, which replaces the North Bridge and includes integrated video) and an 82801GR ICH (ICH7R, which replaces the South Bridge).

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