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1.2. Defining Digital Frequencies

Unlike an analog frequency, a digitally generated frequency does not have infinite resolution. A digital frequency can only take on discrete values. A digital sine wave, for example, can only take on discrete values for frequency, phase, and amplitude. For the purposes of this chapter, the frequency resolution of a digitally generated sinusoid is limited by the period of the digital sample clock T = 1/fS, and the precision of the sinusoidal waveform amplitude is limited by the bit width of each digital sample. Let us begin our discussion by considering a digital sinusoidal waveform.

We know that a sine wave has unity amplitude and is repetitive every 2π radians. As illustrated in Figure 1.1, we can draw a circle of radius 1, called the unit circle, and we can visualize a phasor of unity magnitude rotating around the unit circle at some fixed angular rate ωK. Every time the phasor makes a complete revolution around the unit circle, it has passed through 2π radians and has completed one cycle. We quantify the phasor’s rotational speed as being ωK radians per second. To get started, let us assign the label C to this phasor. Since the phasor C takes on values only at discrete instances of the sample period T, we can represent it as a function of discrete time by writing C(nT) {for n = 0, 1, 2, ...}.

Figure 1.1

Figure 1.1. Unit circle

We can use some simple trigonometry to represent the phasor C(nT) by its vertical and horizontal components, labeled A(nT) and B(nT) in Figure 1.1. The magnitude of C is related to the value of its components by the Pythagorean theorem: 0002_fig01.jpg.

We can see that as the phasor C rotates around the unit circle, the magnitude of the A component cyclically grows from 0 at 0 radians to +1 at π/2 radians. It then attenuates back to 0 at π radians, grows to –1 at 3π/2 radians, and finally attenuates back to a value of 0 as the phasor passes through 2π radians. Each time the phasor completes a rotation of 2π radians, the amplitude of the A component traces out a sine wave and the amplitude of the B component traces out a cosine wave, as illustrated in Figure 1.1.

Since we are dealing with a digital system, we know that the values of the phasor components A, B, and C, and the phasor phase angle θ, shown in Figure 1.1, take on values only at discrete instants of time equal to the period of the sample frequency, or T = 1/fS. Sequential sampling instants can be represented by the infinite series

  • 1T, 2T, 3T, ···, nT, ···

We can represent any arbitrary sampling instant as nT for 0 ≤ n ≤ ∞. Incorporating this notation into the unit circle phasor representation Figure 1.1, we see that the only values that can be represented by the phasor C, its vertical and horizontal components A and B, and the phase angle θ are at the instants of time equal to nT. We know from trigonometry that

0003_equ01.jpg

and

0003_equ02.jpg

We also know that since we are working on the unit circle, the magnitude of 0004_fig01.jpg. Therefore we can state that at any sampling instant nT,

Equation 1.1

and

Equation 1.1

Equation 1.1

So far so good, but how do we quantify the discrete values taken on by the sinusoidal waveforms? Well, we can start by dividing the unit circle into N equal arc segments, illustrated by the black dots on the unit circle in Figure 1.1. Each arch segment is a portion of the unit circle scribed by the tip of the phasor C as the phase angle θ is incremented by 2π/N radians.

We will take this opportunity to coin a new and highly technical term. Let us define the angle 2π/N and the arch segment it describes as a radian chunk. The angle between the adjacent black dots on the unit circle in Figure 1.1 is equal to a radian chunk. The phasor C(nT) and its components A(nT) and B(nT) can only be evaluated at each black dot corresponding to each radian chunk on the unit circle. Therefore the maximum number of samples that can represent a single cycle of a digital sine wave is equal to N.

If the digital oscillator that is generating the digital sinusoid is operating with a sample clock of fS Hz, then the phasor C(nT) would rotate around the unit circle in discrete radian chunks of 2π/N at the clock rate of fS Hz. The lowest radian frequency of the digital oscillator can be mathematically defined as

The lowest or fundamental frequency of the digital oscillator can be mathematically defined as

If we think about it for a minute, Equation 1.2 and Equation 1.3 make sense. If the phasor points to each black dot on the unit circle for one sample period, it will take N sample periods for it to move from dot zero to dot N – 1. In doing so, it will make one revolution of the unit circle stopping once at each black dot in N sample periods. It will take N sample periods to trace out exactly one sinusoidal cycle. The total period for each cycle will be equal to NT sec. The frequency of this sinusoidal cycle is then given by f = 1/(NT second) = (fS/N)Hz. Therefore the frequency of the sinusoids traced by the A(nT) and B(nT) components will be equal to (fS/N)Hz.

Let us look at a very simple example. Suppose we have a digital oscillator clocked with a sample clock of fS = 32 Hz, and suppose we decided that N will be 16. The unit circle is subdivided into 16 equal arc lengths, giving us 16 equal radian chunks. The rotating phasor C(nT) will be evaluated at 16 locations around the unit circle. This means there will be 16 samples per each period of the synthesized sinusoidal waveform. The digital radian frequency would be

or, since fK = ωK/2π, we can easily compute the digital oscillator frequency to be

In this simple example, 2 Hz is the lowest frequency other than zero that our simple digital oscillator can generate. This is based on the value of the sample frequency fS and our choice for the value of N. If, for the same sample rate, we had chosen N to be a larger number, then the resolution of fK would have been greater. For example, if we had selected N = 64, the lowest frequency other than 0 Hz that our oscillator could produce would be

0006_equ01.jpg

This is a good start, but a digital oscillator that can produce only a single frequency isn’t as useful as an oscillator that can be programmed to produce any one of a whole range of discrete frequencies. Ideally, we would like to be able to program the digital oscillator to output any one of a wide range of discrete frequencies. We can achieve this enhancement with the addition of a multiplier “k” in Equation 1.2 and Equation 1.3. We can rewrite these equations to include the multiplier k such that

If k = 1, then the frequencies represented by Equation 1.4 are identical to those represented by Equation 1.2 and Equation 1.3. The value of k can take on discrete integer values ranging from 0 to N/2. In our previous example, we set fS = 32 Hz, and N = 16 so k could take on values of 0, 1, 2, 3, 4, 5, 6, 7, 8. All the possible frequency values that this example oscillator can take on are tabulated in Table 1.1.

Table 1.1. Example Digital Oscillator Frequencies

As we can see from the table, this oscillator can be programmed to produce one of nine possible frequencies with a resolution of 2 Hz. The addition of the variable k in Equation 1.4 causes the phasor C(nT) to rotate around the unit circle in multiples of 2π/N radian chunks at a rate of fS sample per second. When k is set to unity, the phasor will take on values at every black dot on the unit circle producing the oscillator’s lowest or fundamental frequency. In this case, each cycle of the generated sinusoid will be composed of N samples.

When k is set to 2, the phase angle of the phasor θ(nT) will increase in increments of two radian chunks each tick of the sample clock. The phasor C(nT) will take on the values of every second dot, and it will rotate around the unit circle twice as fast, producing a sine or cosine wave that is twice the fundamental frequency. In this case, each cycle of the sinusoid will be composed of half or N/2 samples. Similarly, when k is set to 4 the phasor will travel around the unit circle at four times the fundamental rate, taking on values at every fourth dot to produce an output frequency that is four times the fundamental frequency. Each cycle, however, will be composed of N/4 number of samples per cycle.

When k reaches its maximum value of N/2, which in this example is 8, there will be just two samples per sinusoidal period. The Nyquist rule states that two samples per cycle is the minimum number of samples allowed in order to be able to reconstruct an analog waveform from a digital waveform. This means that the highest frequency we can theoretically generate with a digital oscillator is half the sample rate or fS/2. In our example, when k = N/2 = 8, we were able to generate a sinusoid of 16 Hz, which is exactly half the 32 Hz sample rate.

In Table 1.1, a few of the entries for the “Samples per cycle” column are in fractions. All this means is that each cycle of the sinusoid is generated using a different subset of the N possible samples. That is, successive cycles of the sinusoidal waveform begin on a different sample value.

What happens if we continue to increase the value of k beyond N/2 (which in our example is 8)? If we were to let k = 9, there would be less than two samples per cycle, the Nyquist rule would be violated, and the output waveform would take on the same frequency as if the value of k had been set to 7. The resulting frequency is said to have been aliased or folded, about fS/2. Undersampling an analog sinusoid with an analog to digital converter will cause the digital output sinusoid it to alias down in frequency. This is identical to setting the multiplication factor k of a digital frequency to some number greater than N/2, which will result in the folding or aliasing about the Nyquist frequency of fS/2.

In our example, if we were to say k = 10, the resulting digital frequency would be identical to that obtained by saying k = 6. If we choose k = N – 1 or 15 in our example, the resulting frequency would be identical to the case where k = 1. We can see that all frequencies above k = 8 are folded or aliased down in frequency about the so-called folding frequency of fS/2 = 16Hz. In general, the frequency fN–K aliases down to fK{for (N/2) < k ≤ (N – 1)}.

A simple frequency folding diagram for the case where N = 16 is illustrated in Figure 1.2.

Figure 1.2

Figure 1.2. Frequency folding diagram

Care must be taken at the higher frequencies where the value of k approaches the upper limit of N/2. On paper there is no problem as kN/2, but in a hardware or software implementation the samples must be carefully selected. An extreme example would be setting k = N/2 and using the samples at 0 and π radians. This represents the optimum sample selection for a cosine wave, since the cosine sequence will take on the form

  • B(T) = cos(nπ) = +1, –1, +1, –1, ··· {for n = 0,1,2,3,···}

but these same samples will produce a DC output of 0 for a sine waveform

  • A(T) = sin (nπ) = 0,0,0,0,··· {for n = 0,1,2,3,···}

For this reason, in most designs dealing with narrow band signals, the minimum number of samples per cycle is usually held to some number around 2.5.

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