# Power Integrity Analysis and Management for Integrated Circuits: Power, Delivering Power, and Power Integrity

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## 1.4 Power Integrity (PI)

In its most common use, power integrity refers to the closeness of a power supply to its ideal, or a constant voltage supply, despite changes in power input or load power consumption.

In DC systems, an ideal power supply will maintain a constant output potential difference regardless of load conditions. Practical power supply characteristics—such as load regulation, bandwidth limitations, maximum output capability, delivery network impedance, etc.—result in significant deviations of the output voltage from the ideal.

Figure 1-3 displays some manifestations of a nonideal power supply in a field programmable gate array (FPGA), a common integrated circuit implementation. An FPGA is a very versatile and useful integrated circuit that can be programmed to modify functionality and performance in various ways, such as to address changing operational requirements, to correct for bugs (errors in function), or for experimentation.

In the waveform plot on the left in Figure 1-3, a droop or transient reduction is seen in the operating supply, presumably due to an increase in loading, after which the voltage recovers to a nominal value. When the load is released, an overshoot, or transient rise, bigger than the dip is seen, followed by damped oscillations of the supply voltage, before a return to the nominal voltage level. This plot is of a value measured with respect to a ground, and what is observed is a potential difference between power supply nodes. These variations in the power supply potential—the dip, overshoot, and oscillation—are all undesirable in a DC source, and are various forms of power integrity degradation. What is not seen here is the drop in the potential difference with respect to the supplied emf, or the static drop, another aspect of loss of power integrity.

The waveform on the right in Figure 1-3 displays reduction in droop, overshoot, and supply oscillation or ringing, indicating an improvement in power integrity. Whereas signal integrity is often quantified by signal-to-noise ratio (SNR), particularly for analog signals, we know of no equivalent measure of PI. Load and line regulation, which are measures of static variability of supply voltage, are inadequate in describing droops, overshoots, and ringing, all of which contribute to system malfunctions, and are therefore important to quantify. Further chapters will describe efforts made by the industry in this regard.

### 1.4.1 Contributors to PI Degradation

A well-known aspect of PI degradation is the drop in voltage with load current, commonly referred to as IR drop in the integrated circuit industry. This is related to a source resistance definition for regulated DC power supplies:

#### Equation 1-15

Source resistance (as its name suggests) relates voltage difference to current and therefore has units of resistance, which relates well to unregulated voltage sources with finite source resistance. The lower this source resistance, the higher the ability of the source to provide power to a load. The lower the source impedance of a regulated power supply, the better the quality of the supply in general.

Source resistance is a property of a power source that contributes to voltage reduction, and is controlled in the design of voltage regulators. Resistance to current flow in the power delivery path (or, more aptly, potential difference transfer path) leads to a reduction in the potential difference as determined by Ohm’s Law. This reduction is a dominant component of overall voltage drop and is thoroughly investigated during IC design.

Another key contributor to PI degradation is electromagnetic induction—emf induced in any conductor with changing magnetic flux around it—discovered by Michael Faraday, and independently by Joseph Henry, in 1931:

#### Equation 1-16

where L is termed inductance. The SI unit of inductance is the henry, defined as a weber per ampere, where the weber is the unit for magnetic flux. An emf thus develops across an inductor when the current flowing through it changes in time. This emf essentially opposes the change in current, just as there is opposition to a change of state in any system (Newton’s third law of motion, “To every action, there is an equal and opposite reaction”).

It is instructive to revisit the force-voltage analogy to gain an intuitive understanding of inductance and the emf developed across it as given by equation (1-16). Newton’s second law of motion is quantified as:

#### Equation 1-17

where F is force applied, m is the mass of the object, and a is acceleration, dv/dt, or the rate of change of physical velocity.

One can appreciate the close congruence between Equations (1-16) and (1-17) in a force-voltage analogy, where force in mechanical dynamics is equated with voltage or emf in electrodynamics. As with Equations (1-3) and (1-4), electric current (or the rate of flow of charge) is equivalent to physical velocity. Inductance L is equivalent to mass m, a property that determines inertia. True to this understanding, inductance L is found to be a property that determines electrical inertia. Electrical inertia is the tendency of a conductor to maintain a flow of charge through it unchanged, or to oppose any change in the rate of flow of charge.

As current flow changes through any power delivery path, by load application or release, substantial transient voltage changes are observed proportional to inductance in the path of charge flow. These voltage changes last at least for durations of change of current. Such voltage variations, or L·di/dt noise, can degrade PI. L·di/dt noise may manifest visually as electric sparks that jump across switches in circuits with large inductive loads or conducting large currents.

A third aspect of PI degradation relates to interactions between inductance and capacitance in power delivery pathways. Capacitors, as charge storage elements, are capable of maintaining required potential difference during transient events such as changes in charge flow. They are extensively employed in power delivery to maintain PI. Nevertheless, in combination with path and parasitic inductors, capacitors form what are called “tank” circuits, which create an oscillatory flow of charges when stimulated:

#### Equation 1-18

where L is inductance, C is capacitance, and f is called the resonant frequency of the tank circuit formed.

Resonance is a phenomenon where energy is transferred back and forth from potential to kinetic form. In electrical circuits, capacitors and inductors interact in this manner at their resonant frequencies. As discussed in later chapters, resonances are unavoidable in most power delivery systems, often leading to excessive “ringing” of supply voltage. This is seen in Figure 1-3, where package inductance and die capacitance resonate on stimulation by load currents. Resonant behavior degrades PI and consequently signal integrity (SI). In large integrated circuits, or in printed circuit board power delivery planes, two-dimensional voltage resonances and standing wave patterns may also manifest, leading to spatially distributed noise maxima and minima.

These contributors to PI and SI degradation have been referred to by the authors, for easier recollection, as the 3 Rs of interconnect: resistance, reactance, and resonance. Subsequent chapters deal in greater detail with each of these aspects of PI and their combined effects on functionality, performance, and power integrity. We will also discuss methods of analysis, and management through good design practices and advanced techniques.

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