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Engineering the Complex SOC: Fast, Flexible Design with Configurable Processors

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Engineering the Complex SOC: Fast, Flexible Design with Configurable Processors

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Description

  • Copyright 2004
  • Edition: 1st
  • eBook (Watermarked)
  • ISBN-10: 0-13-265052-5
  • ISBN-13: 978-0-13-265052-6

Engineering the Complex SOC

The first unified hardware/software guide to processor-centric SOC design

Processor-centric approaches enable SOC designers to complete far larger projects in far less time. Engineering the Complex SOCis a comprehensive, example-driven guide to creating designs with configurable, extensible processors. Drawing upon Tensilica’s Xtensa architecture and TIE language, Dr. Chris Rowen systematically illuminates the issues, opportunities, and challenges of processor-centric design.

Rowen introduces a radically new design methodology, then covers its essential techniques: processor configuration, extension, hardware/software co-generation, multiple processor partitioning/communication, and more. Coverage includes:

  • Why extensible processors are necessary: shortcomings of current design methods

  • Comparing extensible processors to traditional processors and hardwired logic

  • Extensible processor architecture and mechanisms of processor extensibility

  • Latency, throughput, coordination of parallel functions, hardware interconnect options, management of design complexity, and other issues

  • Multiple-processor SOC architecture for embedded systems

  • Task design from the viewpoints of software andhardware developers

  • Advanced techniques: implementing complex state machines, task-to-task synchronization, power optimization, and more

  • Toward a “sea of processors”: Long-term trends in SOC design and semiconductor technology

For all architects, hardware engineers, software designers, and SOC program managers involved with complex SOC design; and for all managers investing in SOC designs, platforms, processors, or expertise.

PRENTICE HALL
Professional Technical Reference
Upper Saddle River, NJ 07458
www.phptr.com

Sample Content

Table of Contents

List of Figures.

Foreword by Clayton Christensen.

Foreword by John Hennessy.

Author’s Preface.

Acknowledgments.

1. The Case for a New SOC Design Methodology.

    The Age of Megagate SOCs.

    The Fundamental Trends of SOC Design.

    What’s Wrong with Today’s Approach to SOC Design?

    Preview: An Improved Design Methodology for SOC Design.

    Further Reading.

2. SOC Design Today.

    Hardware System Structure.

    Software Structure.

    Current SOC Design Flow.

    The Impact of Semiconductor Economics.

    Six Major Issues in SOC Design.

    Further Reading.

3. A New Look at SOC Design.

    Accelerating Processors for Traditional Software Tasks.

    Example: Tensilica Xtensa Processors for EEMBC Benchmarks.

    System Design with Multiple Processors.

    New Essentials of SOC Design Methodology.

    Addressing the Six Problems.

    Further Reading.

4. System-Level Design of Complex SOCs

    Complex SOC System Architecture Opportunities.

    Major Decisions in Processor-Centric SOC Organization.

    Communication Design = Software Mode + Hardware Interconnect.

    Hardware Interconnect Mechanisms.

    Performance-Driven Communication Design.

    The SOC Design Flow.

    Non-Processor Building Blocks in Complex SOC.

    Implications of Processor-Centric SOC Architecture.

    Further Reading.

5. Configurable Processors: A Software View.

    Processor Hardware/Software Cogeneration.

    The Process of Instruction Definition and Application Tuning.

    The Basics of Instruction Extension.

    The Programmer’s Model.

    Processor Performance Factors.

    Example: Tuning a Large Task.

    Memory-System Tuning.

    Long Instruction Words.

    Fully Automatic Instruction-Set Extension.

    Further Reading.

6. Configurable Processors: A Hardware View.

    Application Acceleration: A Common Problem.

    Introduction to Pipelines and Processors.

    Hardware Blocks to Processors.

    Moving from Hardwired Engines to Processors.

    Designing the Processor Interface.

    A Short Example: ATM Packet Segmentation and Reassembly.

    Novel Roles for Processors in Hardware Replacement.

    Processors, Hardware Implementation, and Verification Flow.

    Progress in Hardware Abstraction.

    Further Reading.

7. Advanced Topics in SOC Design.

    Pipelining for Processor Performance.

    Inside Processor Pipeline Stalls.

    Optimizing Processors to Match Hardware.

    Multiple Processor Debug and Trace.

    Issues in Memory Systems.

    Optimizing Power Dissipation in Extensible Processors.

    Essentials of TIE.

    Further Reading.

8. The Future of SOC Design: The Sea of Processors.

    Why Is Software Programmability So Central?

    Looking into the Future of SOC.

    Processor Scaling Model.

    Future Applications of Complex SOCs.

    The Future of the Complex SOC Design Process.

    The Future of the Industry.

    The Disruptive-Technology View.

    The Long View.

    Further Reading.

Index.

Updates

Submit Errata

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