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The #1 Practical Guide to Signal Integrity Design—with Revised Content and New Questions and Problems!
This book brings together up-to-the-minute techniques for finding, fixing, and avoiding signal integrity problems in your design. Drawing on his work teaching several thousand engineers and graduate students, world-renowned expert Eric Bogatin systematically presents the root causes of all six families of signal integrity, power integrity, and electromagnetic compatibility problems. Bogatin reviews essential principles needed to understand these problems, and shows how to use best design practices and techniques to prevent or address them early in the design cycle. To help test and reinforce your understanding, this new edition adds questions and problems throughout. Bogatin also presents more examples using free tools, plus new content on high-speed serial links, reflecting input from 130+ of his graduate students.
• A fully up-to-date introduction to signal integrity and physical design
• New questions and problems designed for both students and professional engineers
• How design and technology selection can make or break power distribution network performance
• Exploration of key concepts, such as plane impedance, spreading inductance, decoupling capacitors, and capacitor loop inductance
• Practical techniques for analyzing resistance, capacitance, inductance, and impedance
• Using QUCS to predict waveforms as voltage sources are affected by interconnect impedances
• Identifying reflections and crosstalk with free animation tools
• Solving signal integrity problems via rules of thumb, analytic approximation, numerical simulation, and measurement
• Understanding how interconnect physical design impacts signal integrity
• Managing differential pairs and losses
• Harnessing the full power of S-parameters in high-speed serial link applications
• Designing high-speed serial links associated with differential pairs and lossy lines—including new coverage of eye diagrams
• Ensuring power integrity throughout the entire power distribution path
• Realistic design guidelines for improving signal integrity, and much more
For professionals and students at all levels of experience, this book emphasizes intuitive understanding, practical tools, and engineering discipline, rather than theoretical derivation or mathematical rigor. It has earned a well-deserved reputation as the #1 resource for getting signal integrity designs right—first time, every time.
Preface to the Third Edition xix
Preface to the Second Edition xxi
Preface to the First Edition xxiii
Chapter 1 Signal Integrity Is in Your Future 1
1.1 What Are Signal Integrity, Power Integrity, and Electromagnetic Compatibility? 3
1.2 Signal-Integrity Effects on One Net 7
1.3 Cross Talk 11
1.4 Rail-Collapse Noise 14
1.5 Electromagnetic Interference (EMI) 17
1.6 Two Important Signal-Integrity Generalizations 19
1.7 Trends in Electronic Products 20
1.8 The Need for a New Design Methodology 26
1.9 A New Product Design Methodology 27
1.10 Simulations 29
1.11 Modeling and Models 34
1.12 Creating Circuit Models from Calculation 36
1.13 Three Types of Measurements 42
1.14 The Role of Measurements 45
1.15 The Bottom Line 48
Review Questions 50
Chapter 2 Time and Frequency Domains 51
2.1 The Time Domain 52
2.2 Sine Waves in the Frequency Domain 54
2.3 Shorter Time to a Solution in the Frequency Domain 56
2.4 Sine-Wave Features 58
2.5 The Fourier Transform 60
2.6 The Spectrum of a Repetitive Signal 62
2.7 The Spectrum of an Ideal Square Wave 64
2.8 From the Frequency Domain to the Time Domain 66
2.9 Effect of Bandwidth on Rise Time 68
2.10 Bandwidth and Rise Time 72
2.11 What Does Significant Mean? 73
2.12 Bandwidth of Real Signals 77
2.13 Bandwidth and Clock Frequency 78
2.14 Bandwidth of a Measurement 80
2.15 Bandwidth of a Model 83
2.16 Bandwidth of an Interconnect 85
2.17 The Bottom Line 89
Review Questions 90
Chapter 3 Impedance and Electrical Models 93
3.1 Describing Signal-Integrity Solutions in Terms of Impedance 94
3.2 What Is Impedance? 97
3.3 Real Versus Ideal Circuit Elements 99
3.4 Impedance of an Ideal Resistor in the Time Domain 102
3.5 Impedance of an Ideal Capacitor in the Time Domain 103
3.6 Impedance of an Ideal Inductor in the Time Domain 107
3.7 Impedance in the Frequency Domain 109
3.8 Equivalent Electrical Circuit Models 115
3.9 Circuit Theory and SPICE 117
3.10 Introduction to Measurement-Based Modeling 121
3.11 The Bottom Line 126
Review Questions 128
Chapter 4 The Physical Basis of Resistance 131
4.1 Translating Physical Design into Electrical Performance 132
4.2 The Only Good Approximation for the Resistance of Interconnects 133
4.3 Bulk Resistivity 136
4.4 Resistance per Length 138
4.5 Sheet Resistance 139
4.6 The Bottom Line 143
Review Questions 145
Chapter 5 The Physical Basis of Capacitance 147
5.1 Current Flow in Capacitors 149
5.2 The Capacitance of a Sphere 150
5.3 Parallel Plate Approximation 152
5.4 Dielectric Constant 153
5.5 Power and Ground Planes and Decoupling Capacitance 156
5.6 Capacitance per Length 159
5.7 2D Field Solvers 165
5.8 Effective Dielectric Constant 168
5.9 The Bottom Line 172
Review Questions 173
Chapter 6 The Physical Basis of Inductance 175
6.1 What Is Inductance? 175
6.2 Inductance Principle 1: There Are Circular Rings of Magnetic-Field Lines Around All Currents 176
6.3 Inductance Principle 2: Inductance Is the Number of Webers of Field Line Rings Around a Conductor per Amp of Current Through It 179
6.4 Self-Inductance and Mutual Inductance 181
6.5 Inductance Principle 3: When the Number of Field Line Rings Around a Conductor Changes, There Will Be a Voltage Induced Across the Ends of the Conductor 184
6.6 Partial Inductance 187
6.7 Effective, Total, or Net Inductance and Ground Bounce 193
6.8 Loop Self- and Mutual Inductance 199
6.9 The Power Distribution Network (PDN) and Loop Inductance 204
6.10 Loop Inductance per Square of Planes 210
6.11 Loop Inductance of Planes and Via Contacts 211
6.12 Loop Inductance of Planes with a Field of Clearance Holes 214
6.13 Loop Mutual Inductance 216
6.14 Equivalent Inductance of Multiple Inductors 216
6.15 Summary of Inductance 219
6.16 Current Distributions and Skin Depth 220
6.17 High-Permeability Materials 229
6.18 Eddy Currents 232
6.19 The Bottom Line 235
Review Questions 237
Chapter 7 The Physical Basis of Transmission Lines 239
7.1 Forget the Word Ground 240
7.2 The Signal 242
7.3 Uniform Transmission Lines 243
7.4 The Speed of Electrons in Copper 245
7.5 The Speed of a Signal in a Transmission Line 247
7.6 Spatial Extent of the Leading Edge 251
7.7 “Be the Signal” 252
7.8 The Instantaneous Impedance of a Transmission Line 256
7.9 Characteristic Impedance and Controlled Impedance 259
7.10 Famous Characteristic Impedances 262
7.11 The Impedance of a Transmission Line 266
7.12 Driving a Transmission Line 271
7.13 Return Paths 274
7.14 When Return Paths Switch Reference Planes 278
7.15 A First-Order Model of a Transmission Line 291
7.16 Calculating Characteristic Impedance with Approximations 297
7.17 Calculating the Characteristic Impedance with a 2D Field Solver 300
7.18 An n-Section Lumped-Circuit Model 306
7.19 Frequency Variation of the Characteristic Impedance 314
7.20 The Bottom Line 316
Review Questions 318
Chapter 8 Transmission Lines and Reflections 321
8.1 Reflections at Impedance Changes 323
8.2 Why Are There Reflections? 324
8.3 Reflections from Resistive Loads 328
8.4 Source Impedance 331
8.5 Bounce Diagrams 333
8.6 Simulating Reflected Waveforms 335
8.7 Measuring Reflections with a TDR 337
8.8 Transmission Lines and Unintentional Discontinuities 340
8.9 When to Terminate 343
8.10 The Most Common Termination Strategy for Point-to-Point Topology 345
8.11 Reflections from Short Series Transmission Lines 348
8.12 Reflections from Short-Stub Transmission Lines 351
8.13 Reflections from Capacitive End Terminations 353
8.14 Reflections from Capacitive Loads in the Middle of a Trace 356
8.15 Capacitive Delay Adders 359
8.16 Effects of Corners and Vias 361
8.17 Loaded Lines 367
8.18 Reflections from Inductive Discontinuities 370
8.19 Compensation 375
8.20 The Bottom Line 377
Review Questions 379
Chapter 9 Lossy Lines, Rise-Time Degradation, and Material Properties 381
9.1 Why Worry About Lossy Lines? 382
9.2 Losses in Transmission Lines 385
9.3 Sources of Loss: Conductor Resistance and Skin Depth 387
9.4 Sources of Loss: The Dielectric 392
9.5 Dissipation Factor 396
9.6 The Real Meaning of Dissipation Factor 399
9.7 Modeling Lossy Transmission Lines 405
9.8 Characteristic Impedance of a Lossy Transmission Line 413
9.9 Signal Velocity in a Lossy Transmission Line 415
9.10 Attenuation and dB 417
9.11 Attenuation in Lossy Lines 423
9.12 Measured Properties of a Lossy Line in the Frequency Domain 433
9.13 The Bandwidth of an Interconnect 438
9.14 Time-Domain Behavior of Lossy Lines 445
9.15 Improving the Eye Diagram of a Transmission Line 448
9.16 How Much Attenuation Is Too Much? 450
9.17 The Bottom Line 452
Review Questions 454
Chapter 10 Cross Talk in Transmission Lines 457
10.1 Superposition 459
10.2 Origin of Coupling: Capacitance and Inductance 460
10.3 Cross Talk in Transmission Lines: NEXT and FEXT 462
10.4 Describing Cross Talk 464
10.5 The SPICE Capacitance Matrix 467
10.6 The Maxwell Capacitance Matrix and 2D Field Solvers 471
10.7 The Inductance Matrix 478
10.8 Cross Talk in Uniform Transmission Lines and Saturation Length 479
10.9 Capacitively Coupled Currents 485
10.10 Inductively Coupled Currents 489
10.11 Near-End Cross Talk 492
10.12 Far-End Cross Talk 496
10.13 Decreasing Far-End Cross Talk 503
10.14 Simulating Cross Talk 505
10.15 Guard Traces 512
10.16 Cross Talk and Dielectric Constant 519
10.17 Cross Talk and Timing 521
10.18 Switching Noise 524
10.19 Summary of Reducing Cross Talk 528
10.20 The Bottom Line 528
Review Questions 530
Chapter 11 Differential Pairs and Differential Impedance 533
11.1 Differential Signaling 534
11.2 A Differential Pair 538
11.3 Differential Impedance with No Coupling 541
11.4 The Impact from Coupling 545
11.5 Calculating Differential Impedance 552
11.6 The Return-Current Distribution in a Differential Pair 555
11.7 Odd and Even Modes 561
11.8 Differential Impedance and Odd-Mode Impedance 566
11.9 Common Impedance and Even-Mode Impedance 567
11.10 Differential and Common Signals and Odd- and Even-Mode Voltage Components 570
11.11 Velocity of Each Mode and Far-End Cross Talk 573
11.12 Ideal Coupled Transmission-Line Model or an Ideal Differential Pair 579
11.13 Measuring Even- and Odd-Mode Impedance 580
11.14 Terminating Differential and Common Signals 583
11.15 Conversion of Differential to Common Signals 590
11.16 EMI and Common Signals 595
11.17 Cross Talk in Differential Pairs 601
11.18 Crossing a Gap in the Return Path 604
11.19 To Tightly Couple or Not to Tightly Couple 607
11.20 Calculating Odd and Even Modes from Capacitance- and Inductance-Matrix Elements 608
11.21 The Characteristic Impedance Matrix 612
11.22 The Bottom Line 615
Review Questions 617
Chapter 12 S-Parameters for Signal-Integrity Applications 619
12.1 S-Parameters, the New Universal Metric 619
12.2 What Are S-Parameters? 621
12.3 Basic S-Parameter Formalism 623
12.4 S-Parameter Matrix Elements 627
12.5 Introducing the Return and Insertion Loss 631
12.6 A Transparent Interconnect 636
12.7 Changing the Port Impedance 639
12.8 The Phase of S21 for a Uniform 50-Ohm Transmission Line 641
12.9 The Magnitude of S21 for a Uniform Transmission Line 644
12.10 Coupling to Other Transmission Lines 649
12.11 Insertion Loss for Non-50-Ohm Transmission Lines 655
12.12 Data-Mining S-Parameters 661
12.13 Single-Ended and Differential S-Parameters 663
12.14 Differential Insertion Loss 668
12.15 The Mode Conversion Terms 672
12.16 Converting to Mixed-Mode S-Parameters 675
12.17 Time and Frequency Domains 676
12.18 The Bottom Line 681
Review Questions 683
Chapter 13 The Power Distribution Network (PDN) 685
13.1 The Problem 686
13.2 The Root Cause 688
13.3 The Most Important Design Guidelines for the PDN 690
13.4 Establishing the Target Impedance Is Hard 691
13.5 Every Product Has a Unique PDN Requirement 700
13.6 Engineering the PDN 701
13.7 The VRM 703
13.8 Simulating Impedance with SPICE 706
13.9 On-Die Capacitance 707
13.10 The Package Barrier 710
13.11 The PDN with No Decoupling Capacitors 715
13.12 The MLCC Capacitor 717
13.13 The Equivalent Series Inductance 721
13.14 Approximating Loop Inductance 724
13.15 Optimizing the Mounting of Capacitors 733
13.16 Combining Capacitors in Parallel 740
13.17 Engineering a Reduced Parallel Resonant Peak by Adding More Capacitors 746
13.18 Selecting Capacitor Values 748
13.19 Estimating the Number of Capacitors Needed 754
13.20 How Much Does a nH Cost? 756
13.21 Quantity or Specific Values? 760
13.22 Sculpting the Impedance Profiles: The Frequency-Domain Target Impedance Method (FDTIM) 766
13.23 When Every pH Counts 772
13.24 Location, Location, Location 777
13.25 When Spreading Inductance Is the Limitation 781
13.26 The Chip View 785
13.27 Bringing It All Together 789
13.28 The Bottom Line 792
Review Questions 794
Appendix A 100+ General Design Guidelines to Minimize Signal-Integrity Problems 797
Appendix B 100 Collected Rules of Thumb to Help Estimate Signal-Integrity Effects 805
Appendix C Selected References 815
Appendix D Review Questions and Answers 819
Index 931
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