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Comprehensive coverage spans the entire computer design field
- Utilizes a top-down approach of computer system, processor, and control unit for clarity and ease of use. The objective is to present the material in a fashion that keeps new material in a clear context.
- Systems are viewed from both the architectural and organizational structure perspectives to help students gain a comprehensive overview of computer design.
- A unified treatment of I/O provides a full understanding of I/O functions and structures, including discussions of DMA, direct cache access, and external interfaces.
- A focus on multicore gives students a broad understanding of this technology, found in virtually all contemporary machines.
- A thorough discussion of instruction sets, including a new chapter on assembly language.
- Detailed use of specific examples throughout the book to illustrate concepts, including Intel x86, ARM embedded system architecture, and IBM z13 mainframe.
Hands-on experience reinforce concepts from the text
- Homework problems, case studies, and additional student resources enhance their understanding of the material.
- Projects and other student exercises are richly supported with a variety of research, simulation, and assembly language projects that instructors can use to tailor a course plan.
- Over 20 interactive simulations illustrate computer architecture design issues, providing a powerful tool for understanding the complex design features of a modern computer system.
Chapter updates keep the text current
- Several chapters and discussions have been revised for the 11th Edition, including:
- NEW - A discussion of multichip modules (MCMs) has been added to Chapter 1.
- UPDATED - Updated treatment of SPEC benchmarks in Chapter 2 covers the new SPEC CPU2017 benchmark suite.
- NEW - A chapter on memory hierarchy expands on material that was in the cache memory chapter and adds expanded coverage of both the principle of locality and the memory hierarchy.
- REVISED - The cache memory chapter (Chapter 5) now includes expanded treatment of logical cache organization, including new figures, to improve overall clarity.
- NEW - Coverage of content-addressable memory, write allocate, and no write allocate policies have been added to Chapter 5.
- NEW - A section on the increasingly popular Embedded DRAM, or eDRAM, is included in Chapter 6.
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- UPDATED - Read online or offline. Download the mobile app to read wherever life takes you, even offline. The app is available on the App Store® and Google Play Store.
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- Engage learners with compelling media. Videos and animations bring key concepts to life, helping students place what they are reading into context. (Available with select titles.)
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Check out the preface for a complete list of features and whats new in this edition.
- Copyright 2019
- Pages: 884
- Edition: 11th
- ISBN-10: 0-13-518897-0
- ISBN-13: 978-0-13-518897-2
Comprehensively covers processor and computer design fundamentals.
Computer Organization and Architecture introduces the fundamentals of computer organization and architecture, and relates these to contemporary design issues.
For graduate and undergraduate courses in computer science, computer engineering, and electrical engineering.
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NOTE: This ISBN is for the Pearson eText access card. Pearson eText is a fully digital delivery of Pearson content. Before purchasing, check that you have the correct ISBN. To register for and use Pearson eText, you may also need a course invite link, which your instructor will provide. Follow the instructions provided on the access card to learn more.
Table of Contents
1. Basic Concepts and Computer Evolution
2. Performance Concepts
II. THE COMPUTER SYSTEM
3. A Top-Level View of Computer Function and Interconnection
4. The Memory Hierarchy: Locality and Performance
5. Cache Memory
6. Internal Memory
7. External Memory
9. Operating System Support
III. ARITHMETIC AND LOGIC
10. Number Systems
11. Computer Arithmetic
12. Digital Logic
IV. INSTRUCTION SETS AND ASSEMBLY LANGUAGE
13. Instruction Sets: Characteristics and Functions
14. Instruction Sets: Addressing Modes and Formats
15. Assembly Language and Related Topics
V. THE CENTRAL PROCESSING UNIT
16. Processor Structure and Function
17. Reduced Instruction Set Computers
18. Instruction-Level Parallelism and Superscalar Processors
19. Control Unit Operation and Microprogrammed Control
VI. PARALLEL ORGANIZATION
20. Parallel Processing
21. Multicore Computers