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Computer Organization and Architecture: Designing for Performance, 7th Edition

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Computer Organization and Architecture: Designing for Performance, 7th Edition

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Features

• Systems are viewed from both the architectural (attributes of a system visible to a machine language programmer) and organizational (operational units and their interconnections that realize the architecture) perspectives — Designed to present material within a useful context for clarity.

• Thorough coverage of computer arithmetic — Addresses twos complement and floating point representations and arithmetic, with detailed examination of IEEE 754.

• Liberal use of figures, tables, and examples — Provides

clarification of key concepts every step of the way.

• Detailed treatment of bus organization — Assists students in understanding thefunctioning of buses to evaluate key design issues.

• Unified, detailed treatment of I/O — Demonstrates the interaction of I/O modules with the outside world and the CPU. Provides full understanding of I/O functions and structures, including two important external interface examples: FireWire and InfiniBand.

• Strong chapter on RISC — Illustrates the importance of the technology found in virtually all contemporary machines.

• Thorough discussion of cache memory — Presents a clear review of the increasingly complex design of cache memory, a central element in the design of high-performance processors.

• Detailed treatment of internal and external memory — Delivers a unified discussion of the elements of the memory hierarchy, from registers to optical memory, as well as leading-edge areas, such as optical, advanced DRAM, and RAID disk arrays.

• Numerous running examples, especially Pentium 4, throughout the text — Highlights specific system examples to illustrate points and motivate the reader, with special attention to the most important CISC and superscalar systems, including Pentium 4 and PowerPC G4.

• Clear treatment of parallel processors — Exceptionally clear, well-organized treatment of symmetric multiprocessors (SMP), clusters, and NUMA systems.

• Full treatment of microprogrammed implementation — Provides a solid review of this often-overlooked area.

• Built-in assessment tools – Includes review questions for

each chapter, plus lists of key words and common acronyms.

• Companion Website -- Access textbook-related resources and support materials for students and instructors maintained by the author.

• Student Resource Site -- Access a wealth of computer science-related information including mathematics reviews, how-to documents, research resources, and career explorations maintained by the author.

Description

  • Copyright 2006
  • Edition: 7th
  • Book
  • ISBN-10: 0-13-185644-8
  • ISBN-13: 978-0-13-185644-8

With up-to-date coverage of modern architectural approaches, this handbook provides a thorough discussion of the fundamentals of computer organization and architecture, as well as the critical role of performance in driving computer design. KEY TOPICS: Captures the field’s continued innovations and improvements, with input from active practitioners. Reviews the two most prevalent approaches: superscalar, which has come to dominate the microprocessor design field, including the widely used Pentium; and EPIC, seen in the IA-64 architecture of Intel's Itanium. Views systems from both the architectural and organizational perspectives. Includes coverage of critical topics, such as bus organization, computer arithmetic, I/O modules, RISC, memory, and parallel processors. MARKET: For professionals in computer product marketing or information system configuration and maintenance.

Sample Content

Table of Contents

Part 1: Overview

  1. Introduction. 2. Computer Evolution and Performance.
Part 2: The Computer System

3. A Top-Level View of Computer Function and Interconnection. 4. Cache Memory. 5. Internal Memory Technology. 6. External Memory. 7. Input/Output. 8. Operating System Support.

Part 3: The Central Processing Unit 9. Computer Arithmetic. 10. Instruction Sets: Characteristics and Functions. 11. Instruction Sets: Addressing Modes and Formats. 12. CPU Structure and Function. 13. Reduced Instruction Set Computers (RISCs). 14. Instruction-Level Parallelism and Superscalar Processors. 15. The IA-64 Architecture. Part 4:  The Control Unit

16. Control Unit Operation. 17. Microprogrammed Control.

Part 5: Parallel Organization 18. Parallel Processing. Appendix A: Digital Logic

Boolean Algebra. Gates. Combinational Circuits. Sequential Circuits. Problems.

Appendix B: Number Systems

The Decimal System. The Binary System. Converting between Binary and Decimal. Hexadecimal Notation. Problems.

Appendix C: Projects For Teaching Computer Organization and Architecture

Research Projects. Simulation Projects. Reading/Report Assignments.

References. Glossary. Index. Acronyms.

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