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Claudio DeSanti

Silvano Gai, who grew up in a small village near Asti, Italy, has more than 27 years of experience

in computer engineering and computer networks. He is the author of several books and technical

publications on computer networking and multiple Internet Drafts and RFCs. He is responsible

for 30 issued patents and 50 patent applications. His background includes 7 years as a full

professor of computer engineering, tenure track, at Politecnico di Torino, Italy, and seven years

as a researcher at the CNR (Italian National Council for Scientifi c Research). For the past 12

years, he has been in Silicon Valley where, in the position of Cisco Fellow, he was an architect

of the Cisco Catalyst family of network switches, of the Cisco MDS family of storage networking

switches, and of the Nexus family of data center switches. Silvano teaches a course on I/O

Consolidation, Data Center Ethernet, and Fibre Channel over Ethernet at Stanford University

(see http://scpd.stanford.edu/certifi cates/fcoe).



Claudio DeSanti is a Distinguished Engineer in the Advanced Architectures & Research organization

at Cisco. He represents Cisco in several National and International Standards Bodies,

such as INCITS Technical Committee T11, IEEE 802.1, IETF, and in industry associations. He

is vice chairman of the INCITS T11 Technical Committee, chairperson of various working

groups, including FC-BB-5, where FCoE has been developed, and technical editor of different

standards, including IEEE 802.1Qbb, where Priority-based Flow Control is defi ned. He is

author of several patents and international publications, including ten RFCs in IETF and other

standards in the American National Standard Institute. He received many honors and awards,

including the INCITS 2008 Technical Excellence Award, the INCITS 2007 Team Award, and the

INCITS 2006 Gene Milligan Award for Effective Committee Management. Claudio’s research

interests include network protocols, storage networking, routing, and security. He holds a Ph.D.

in computer engineering from the Scuola Superiore Sant’Anna in Pisa, Italy.