The Business of Making Semiconductors
Semiconductor manufacturing is a multibillion-dollar business with hundreds of suppliers, large and small, playing their part. From raw silicon in one end to finished product out the other, every chip passes through a dozen different corporate hands. Nothing is small scale and even the smallest niches in the supply chain are multimillion-dollar markets employing thousands of people.
Some segments of the industry are labor intensive and have been gradually moving from country to country as taxes, wage rates, and educational levels change and shift. Others are capital intensive and tend to stay centered in industrialized countries. Copyrights, patents, and intellectual property laws also affect what business is best carried out where.
Semiconductor Food Chain
Like any big industry, the business of designing, making, and selling semiconductors has several steps and a lot of middlemen. The big all-under-one-roof manufacturers like Intel are fairly rare. Most of the world's big chip makers use outside contractors for some of their business, whereas some small (and not-so-small) chip companies don't manufacture anything at all.
Figure 5.9 provides a simplified illustration of how the entire semiconductor "food chain" works for a number of representative companies. The diagram flows from left to right and includes some of the interrelated players. It doesn't include the chip-design phase, which was covered in Chapter 3, "How Chips Are Designed." At this point, we're assuming that the chip design is finished and ready to go.
Figure 5.9 Chips can be manufactured in-house, by a fab partner, or by an independent foundry. In any case, the owner of the fab has to buy equipment and chemicals on the open market, and the final product will be sold through independent sales channels.
Independent Device Manufacturer
The simplest example is also the most well known. Intel is an example of an independent device manufacturer (IDM). Nearly everything about Intel's chips is done in-house. Its processors are designed by Intel engineering employees, they're manufactured on Intel's own fabs, and the chips are sold, obviously, under Intel's name. The only part that Intel outsources is the actual stocking, warehousing, and distribution of its chips. A worldwide network of independent third-party companies handles this final link in the value chain.
Fabless Chip Company
In our second example, IBM operates just like Intel does. IBM employees design the chips and IBM employees manufacture them using IBM's own factories. The chips are sold with IBM's name and logo on them. Where IBM differs from Intel is that IBM also makes chips for other companies. IBM rents out its factories to a select group of companies that do not own a fab. These "fabless" customers rely on IBM and companies like it to build their chips for them.
Xilinx is an example of a fabless chip company. Xilinx designs and sells its own FPGAs but doesn't actually build them. For years, Xilinx has used IBM (and a few other companies) to build its FPGA chips. The chips are labeled with Xilinx's name and logo and appear to be Xilinx-made chips. IBM only provides a service; the company can't sell Xilinx's chips, nor can it make any extra ones for its own use.
Our third example is simply Brand X, a fabless chip company that uses a foundry instead of another chip company to manufacture its chips. Foundries are simply independently owned fabs, and they are covered in more detail near the end of this chapter. Unlike the Intel and IBM examples, foundries don't make any chips of their own; they simply provide manufacturing services to their clients. Part of a foundry's business is to keep all of its clients separate and anonymous. It's also a delicate juggling act to balance the production needs of several clients that are all demanding parts at once. TSMC is an example of a foundry, the largest one in Taiwan.
Materials In, Distributors Out
All chip companies share some things in common, regardless of which of these three business models they follow. Fabs and foundries need to buy their manufacturing tools and equipment from outside vendors. Whether it's Intel, IBM, or TSMC, they all buy their heavy equipment from a variety of American, European, and Asian tool suppliers. Likewise, all the manufacturers buy their chemicals and other consumable items from an assortment of competitive vendors.
Finally, few of the major chip companies actually sells its own chips. Instead, they refer the task to a components distributor or a manufacturers' representative firm, or both. Reps and disties, as they're often called, are the front-line sales force for almost all chip makers around the world. Like automobile dealers, they can carry more than one product line as long as those lines aren't directly competitive (i.e., Intel and AMD for microprocessors). Distributors tend to be bigger companies that deal in a greater volume of parts, and they specialize in quick delivery time and razor-thin margins. Rep firms, on the other hand, tend to be component "boutiques," representing smaller companies with esoteric or specialized chips. Manufacturers' reps always represent more than one company's products, and often more than a dozen, so avoiding conflicts of interest is a lot tougher.
Facilities and Equipment
Semiconductor manufacturing is a hugely capital-intensive business, right up there with steel mills, space programs, and automobile manufacturing. Erecting a new chip factory costs more than $1 billion, and it'll be obsolete in less than five years. The stakes are very high indeed, and national pride is often at stake. Labor costs add to the overhead, and shipping costs can be considerable if the plant is not located in the same country as its customers.
Even a back-of-the-napkin analysis shows that, with a startup cost of over $1 billion and a useful life of only a few years, you'd need to depreciate a mind-boggling $500,000 to $1 million per day. Let's hope you're manufacturing something the world wants!
Part of the cost of building a fab is, of course, the building itself (see Figure 5.10). Fabs might be as small as 50,000 square feet (4,500 square meters) or as large as 1 million square feet (90,000 square meters). They can be built almost anywhere because they dont require much in the way of natural resources. Lots of open space, stable soil, and solid bedrock are the most important factors, making the preponderance of fabs in Californias Silicon Valley seem a little incongruous. A stable foundation is the most important thing because chip-making equipment is very delicate and sensitive to vibrations. Imagine a Swiss watchmaker trying to work on a wobbling Alpine train and you get the idea. These machines have to be kept very still.
Figure 5.10 This fab, or chip factory, looks like most fabs around the world. The large flat windowless building in the background houses the clean rooms where chips are actually produced. Other buildings contain offices and chemical storage. Fabs are always built low to the ground to give the delicate equipment a steady base to work on. Courtesy of Texas Instruments. Used with permission.
Tradition keeps a lot of fabs in California. Crowded, expensive, and prone to earthquakes, the Santa Clara Valley would seem the worst place to build a fab, and geologically speaking it is. However, this area is the sentimental heart of the semiconductor industry, the location of most companies' headquarters, and source of trained talent and graduate students. Most new fabs are now built elsewhere, but many of the industry's early fabs are still running at full capacity in the heart of Silicon Valley.
Construction firms specialize in building fabs and clean rooms. A fab looks like a conventional office building, and much of it is. Most of the workers will have their offices on the ground floor. The clean rooms will be on the upper floor, mounted on rubber shock absorbers, literally suspended in the middle of the building. Rubber bumpers and springs isolate the sensitive equipment from earth tremors and even from the disruptive footsteps of the workers downstairs. (For more on how chips are made in a clean room, turn to Chapter 4, "How Chips Are Made.")
It costs about $3,500 per square foot to build a clean room, versus $175 per square foot for the office space in the rest of the building. Annual maintenance costs per square foot are also higher for the clean room, because of the need to keep the air filters and other high-maintenance equipment in top condition.
Because fabs require lots of space but little in the way of natural resources (other than educated labor), they tend to be located near, but just outside of, major cities. Fabs employ thousands of well-trained and well-paid people who contribute to the local economy, making them desirable commercial neighbors. Finally, fabs are relatively clean industrial installations that require only a supply of fresh water and a way to contain the hazardous chemicals used in manufacturing.
Governments and municipalities quickly zeroed in on these positive aspects of the business and routinely offer compelling tax incentives for semiconductor companies to locate new fabs in their jurisdiction. Roads and water supplies are put in and even new universities are constructed to provide a ready supply of skilled labor. The government of Arizona was a particularly attentive suitor in the 1990s, which explains why so many fabs are located around the cities of Scottsdale and Phoenix. The governments of Ireland and Scotland were similarly generous, offering five- and 10-year tax waivers for companies that would build a fab on their shores and employ their citizens. Only now are some companies paying local, state, or national taxes on the business coming from facilities that were built in the early 1990s.
Once the fab is built, it's time to outfit it with equipment. In the early days of the semiconductor industry, all the major players used to build their own equipment. Fairchild, Texas Instruments, Motorola, and others all designed their own manufacturing equipment on one floor, then dragged it upstairs to make chips. Nowadays, semiconductor-manufacturing equipment is a multibillion-dollar commercial industry in its own right.
The necessary equipment can be purchased from a number of different companies based in Japan, Europe, and the United States. Chief among these are Applied Materials, Tokyo Electron Limited (TEL), Nikon, KLA-Tencor, ASM Lithography, Teradyne, Lam Research, Canon, and a dozen others. Applied Materials of Santa Clara, California, has been the market leader in recent years, as Figure 5.11 shows. Before the industry downturn in 2001, the top 10 semiconductor-equipment manufacturers collected a total of $29.3 billion. Thats about 14 percent of the size of the semiconductor market itself in that year ($204 billion), or more than all the DRAM makers combined. Its sometimes wiser to be the one supplying the picks and shovels than to be standing in the creek panning for gold.
Figure 5.11 Top 10 semiconductor-manufacturing equipment suppliers, by 2000 revenue. Courtesy of VLSI Research, Inc. Used with permission.
It's common for companies to build a new fab and then outfit only half of the building or less with manufacturing equipment. That's pretty normal for heavy manufacturing businesses; the first shovel of dirt is the most expensive part. After that, it's just capital expenditure.
There are currently about 1,000 working fabs around the world in a dozen different countries. Most of these are different from one another, although large companies such as Intel prefer to build identical facilities in separate locations. This strategy, which Intel calls "copy exact," allows the company to increase, reduce, or shift production of its components based on market demand or in the event of a plant failure.
It takes about 18 months to build and outfit a new fab, so planning ahead is crucial. Given that semiconductor product cycles and trends can shift suddenly and abruptly in just a few weeks or months, companies take a big gamble when they commit to a new fab. One billion dollars and a year or so later, it might turn out to have been a bad bet.
The most expensive thing in the world is a chip-making plant running at less than full capacity. Fabs depreciate at an alarming rate. If that manufacturing capacity isn't utilized while it's still valuable, the money sunk into building the fab is lost.
Figure 5.12 shows a snapshot of IC fab utilization worldwide for 12 quarters (three years) from the end of 1999 through mid-2002. Not surprisingly, utilization fell off in 2001 as vendors cut back production to meet diminishing demand. Unfortunately for them, their rent didn't decrease and the equipment didn't stop depreciating during that time. They merely invested $1 billion dollars in a fab that only produced two-thirds of the chips originally forecast.
Figure 5.12 The utilization for the worlds fabs has seen ups and downs over the past few years. Courtesy of World Semiconductor Trade Statistics. Used with permission.
Nowhere is the urgency to run at full production more apparent than for DRAMs. DRAMs are nearly commodities, produced in huge volumes, technically interchangeable, and very price competitive. Maintaining tolerable profit margins depends on economies of scale. With only a few pennies' profit per chip (in normal times), every little bit of volume or percentage point of market share can make a big difference. The DRAM market is also very elastic: As prices go down, demand goes up. Furthermore, the efficiency of the DRAM manufacturing process depends largely on experience and volume. The more DRAMs you make, the better you get at it.
When you combine the financial risk of building and running a fab with the volatility and narrow profit margins of DRAMs, you conjure up the recipe for a seriously precarious business, and so it is with DRAMs. DRAM prices cycle up and down with such regularity that market researchers serenely predict downturns seven years in advance, and with some accuracy. Every boom-and-bust cycle shakes out a few DRAM manufacturers, and the survivors close ranks. If a DRAM company misjudges its manufacturing capacity by a few percentage points or is a few months late in bringing out the next new chip, its business might collapse in the next downturn. There are fewer DRAM makers today than there were five years ago, and fewer still than there were five years before that.
Microprocessor makers sometimes face the opposite problem. Microprocessor chips can be very profitable (sometimes more than $100 per chip), but there's a limited demand for them at any given price. Rather than optimize their fabs to run at 100 percent of capacity, microprocessor makers want to ensure they have some excess capacity in case demand suddenly surges. The opportunity cost lost by misjudging demand (and abdicating market share to a competitor) encourages CPU makers to keep a little fab capacity in reserve.
Full capacity means different things at different fabs. Not all fabs are created equal and some can process more wafers than others. For a new, high-ca_pacity fab, 50,000 wafers per month is a good production target. Using this as a yardstick, Figure 5.13 shows how reducing production increases the cost per wafer. This is because fabs are fixed-cost assets where amortization of the equipment and the building don't change with volume. Although material costs might fall, and labor might be reduced a little bit, these are relatively minor expenses next to maintaining the fab itself. For a top-of-the-line fab processing 300-mm wafers, as much as 50 percent of the production cost is depreciation on the equipment.
Figure 5.13 Cost penalty for low wafer runs (normalized to 50,000 wafers per month). Courtesy of IC Knowledge. Used with permission.
Because of this, a semiconductor vendor's profit margins closely track utilization of its fabs. Graphing overall average utilization versus overall average profit margins for the world's semiconductor makers over the period of 1978 to 1995 (Figure 5.14), we see a strong correlation between the two. The break-even point comes at about 50 percent utilization; below that, companies lose money as their investment in their fabs evaporates.
Figure 5.14 Profit margins as a function of fab utilization. Courtesy of IC Knowledge. Used with permission.
Silicon Cost Model
Part of the cost of producing chips is, of course, the silicon itself, although not as much as you might think. There are a great many chips in which the silicon is actually the cheapest part. The plastic package sometimes outweighs the silicon it houses in the financial balance.
Let's look at an example of a medium-sized chip to see the factors that affect its cost. Figure 5.15 shows materials and processes that contribute to the $10.37 cost of manufacturing our chip. Our example chip measures 50 mm2 (about 7 mm, or a quarter of an inch, on a side), which is about the size of a pencil eraser. The number of transistors in the chip isn't relevant, but let's say it has about 8 million. The chip is manufactured in the United States (which is relevant) on 200-mm (8-inch) wafers using a 0.25-micron, four-layer metal process.
Figure 5.15 Cost factors contributing to die manufacturing cost. This example is a 50-mm2 chip built using 0.25-micron, four-layer-metal CMOS process on 200-mm wafers. Overhead and amortization of the fab is not included.
Bear in mind that our cost model does not include any of the overhead costs for the fab previously mentioned (depreciation, electricity, water, maintenance, etc.), nor does it include the cost of labor, photomasks, or consumable chemicals. We're only considering actual material costs for now.
For our example chip, the biggest material cost is the silicon wafer itself. The going rate for a 200-mm silicon wafer suitable for our purposes is about $3,100. (This is fully burdened and partially processed, factors that we'll ignore from here on.) If we were to use a more modern or aggressive process, say, 0.13-mi_cron or 0.09-micron, the wafer would be more expensive. If we needed more than four layers of metal wiring to connect our 8 million transistors together, the wafer would be more expensive still. Finally, if we wanted to use copper instead of aluminum on any of the metal layers, the cost of the wafer would probably double. Naturally, going the other way and using smaller wafers and coarser design geometry could cut the cost of the wafer by half, or even less.
Figure 5.16 breaks down the worldwide market for semiconductor materials, including silicon wafers. Again using our benchmark year of 2000, this was a $16 billion market in raw materials and various hazardous chemicals. This is about half as much revenue as the equipment makers collected in that year, or about 8 percent of what the semiconductor makers themselves raked in.
Figure 5.16 Breakdown of the $16 billion market for semiconductor raw materials for 2000. Courtesy of Semiconductor Equipment and Materials International. Used with permission.
Because 47 percent of the raw materials market, or $7.5 billion, was for the magic stuff itself, let's take a quick look at who supplies the silicon to Silicon Valley and the rest of the world. Figure 5.17 breaks down the processed-sil_icon market, including the top vendors' market shares in 2000.
Figure 5.17 Processed silicon suppliers, 2000. Courtesy of World Semiconductor Trade Statistics. Used with permission.
Looking at the top half-dozen suppliers of siliconthe very stuff of modern technology and the basis of so much world industryare any of the names familiar to you? Not even one? Don't feel bad, because these are companies that only a chemical engineer could love. Although they fulfill a vital role in the modern economy, they're largely unknown and unsung.
Gross Die per Wafer
Chip cost is basically the cost of processing the silicon wafer divided by the number of chips on the wafer, minus the cost of any chips that don't workand there are always chips that don't work. Naturally, you want to get as many chips as possible from each wafer, but this isn't always easy. Chips are square (or rectangular) and wafers are round, so fitting them isn't easy. Here we need to call on some obscure mathematics called packaging theory. For any shape and size of chip, there is an ideal way to arrange them on a circular wafer to get the greatest number of chips.
You'll notice that around the edges of the wafer in Figure 5.18 there are some chips that go off the edge. Obviously these chips are no good, but it's easier for the equipment to put them there anyway. Sometimes engineers probe or measure these partial chips just to see how well the manufacturing equipment is working at the edge of the wafer.
Figure 5.18 A completely processed wafer makes dozens or hundreds of finished chips, all exactly the same. Courtesy of Texas Instruments. Used with permission.
Our example chip is square (as opposed to rectangular) so, without getting into the mathematics, we discover we can fit 575 whole chips onto a 200-mm wafer. Dozens more will overlap the edges but we won't count those because they'll be cut off and discarded.
Defects and Yield
Not every one of our 575 chips is likely to work after all is said and done. There will inevitably be some slight manufacturing defects here and there. Tiny particles of dust in the cleanest of clean rooms can settle on a wafer during processing and ruin some of the chips. Some particles stick and some can be dusted off, although at this microscopic scale, just the "impact" of a dust particle landing on the wafer usually craters the chip in question. Imperfections in the processing chemicals also cause defects, with contaminated water being a major culprit. Contaminated in this case means ultrapure water that has a few stray molecules of something other than hydrogen and oxygen. Every step in the complicated manufacturing process adds to the risk of contamination as stray particles are stirred up while the chip passes through each piece of equipment.
The ratio of good chips to bad chips is called the yield and it's never 100 percent. Chip companies very closely guard their actual yield numbers the way poker players guard their cards and for the same reason: They don't want to give competitors any inside information. Anything less than 100 percent yield is embarrassing, but every company knows that goal is impossible. Yields of 85 percent to about 97 percent are typical for midrange and high-end ICs. Simple chips will enjoy higher yields, whereas new or complex chips will have embarrassingly low yields.
The yield depends on two things: the defect density and the die area. The defect density is the average number of contaminating particles that land on every square centimeter of silicon. The fewer and farther apart these particles are, the better. Defect density is like the scatter pattern of a shotgun; die area is the size of the target.
Defect densities for good, clean, mature processes can range from 0.05/cm2 to 0.20/cm2. In the early stages of production, these figures will be much higher. As the equipment "settles in" and the production staff gains experience, the defect density goes down over time. Changing air filters in the fab can also make a difference.
Big chips make bigger targets, so their yield rate is lower. Also, some chips are more resistant to defects than others. For example, almost any defect on a microprocessor, DSP, or logic chip will ruin it. Memory chips, on the other hand, are designed with redundant memory cells for exactly this reason. If a few cells get damaged during manufacturing, alternate memory cells are used in their place. So although dust particles don't deliberately seek out logic chips and avoid memory chips, memory chips seem more immune to contamination because of their redundant nature.
Big chips are a big financial risk. Assuming dust and contaminants scatter themselves randomly over the wafer, and assuming there are more than a few particles to go around, it's likely that nearly every big chip will get hit with some contaminant or another. Intuitively, this makes sense. If the entire wafer were nothing but one big chip, it would definitely be ruined. If the wafer was covered with zillions of tiny chips, most of them could dodge the barrage. Figure 5.19 shows how this could happen. The bigger the chip, the worse the yield is going to be, making large chips disproportionately expensive to manufacture.
Figure 5.19 With the same pattern of defects on two identical wafers, larger chips are disproportionately affected by contaminants.
Yields generally improve dramatically over time, if you define dramatically as a 5 percent improvement. Experience counts for a lot in this business and process technicians spend agonizing hours and sacks of their employers' money to improve yields by 1 percent. For the first few days after a new fab comes online, virtually all of the chips are a total loss. It takes time for the heavy equipment to settle in, and for the environment to cleanse itself. Little details here and there can affect yield, and nothing escapes the process engineers' scrutiny. Four to six months into production, yields should be nearly optimal.
Getting back to our example chip, our 0.25-micron fab processes have a defect density of 0.50 defects per cm2 (pretty average) and the effective area of the chip is 85 percent, meaning 15 percent of the chip is not completely covered with transistors and therefore relatively insensitive to flaws. According to something called Dingwall's equation, we can expect about 81 percent of our chips to work. Another 19 percent, alas, won't make it out the door as working chips.
An 81 percent yield leaves us with 465 good chips out of 575 total chips on the wafer. The other 110 chips can be made into tie tacks or ground into sparkly scrap. Dividing the $3,100 cost of the wafer by the 465 good chips, we come up with a cost of $6.67 per chip. However, we're not done.
Packaging and Testing
At this point, our example chip is still just a bare square of silicon. We know it works but it's not ready to sell. We'll put this chip into a plastic housing that costs about $2.00 in volume. The labor to attach the bare chip to a lead frame (a collection of wires) and encapsulate it in plastic adds another $0.50 of cost. There are a number of package types we can choose from, and our customers might be very picky about the package they prefer. Small-outline, surface-mount packages have become very popular, as the statistics in Figure 5.20 show. Fortunately, these small-outline packages are among the cheapest. Packages made out of ceramic, such as the pin-grid array, are expensive in comparison to plastic, sometimes eclipsing the cost of the silicon itself.
Figure 5.20 The small-outline packages are by far the most common and are also among the cheapest. Courtesy of IC Knowledge. Used with permission.
Now our chip must be tested one last time before we ship it to a customer or a distributor. After all the handling and packaging, a few chips will fail their final test. Some might have been zapped by static electricity because a technician walked across a carpet or combed his or her hair. Some chips will be overly sensitive to heat and fail during the plastic encapsulation process. Others might work fine at slow speeds but do funny things at full speed. In this last case, we have the option of marking the chips down and selling them at a discount or scrapping them completely. Testing itself adds $1.00 to our cost (mostly labor), and the fallout from testing effectively adds $0.20 to each remaining part. At the end of the day, we've spent $10.37 to produce one chip.
Economics of Updating Fabs
Semiconductor fabs depreciate rapidly and the state of the art is never so for long. Top-end chip makers have to commit to getting on, and staying on, an astonishingly expensive treadmill. Leading-edge production equipment is hideously expensive and needs to be upgraded or replaced every year or so. For major segments of the semiconductor market, there is no other way to stay in business. It's said that driving racecars for a living is like standing in a wind tunnel tearing up $100 bills. Making chips for a living is like buying a new Boeing 747 every week.
For some high-end chips like microprocessors, nothing but the very best will do. Nobody wants to buy a slow PC. These fabs need to be kept at the cutting edge of fabrication technology all the time. Falling behind your competitor, even for a few months, might doom all the chips your fab produces to the scrap bin, or they might become key chains, given away to bored attendees at the next trade show.
It isn't always so stressful, however. There are plenty of other types of chips that don't have to be particularly fast or especially advanced. In fact, most of the world's chips are built in relatively pedestrian semiconductor technologies that are one or two steps behind the current state of the art (e.g., making 150-nanometer transistors when 90-nanometer technology is the latest thing). Plenty of chips are built on fab lines that are a few generations behind the curve. Old fabs don't spontaneously explode or fall into the soil when they get out of date, but they don't necessarily get cheaper, either.
There are good reasons why companies want to leave older fabs in place, and good reasons why they wouldn't. It all depends on the segments of the market they are trying to serve. On the one hand, keeping an older fab in production makes perfect sense. It gives a company more time to amortize the crushing cost of building it. Maybe they won't be able to build leading-edge chips anymore, but the world buys lots of cheap and slow chips, too. Instead of making ultrafast microprocessors, the company could shift production to standard logic parts, and then to diodes and LEDs, and finally, to resistors. With this strategy, they could keep a fab running at full capacity for many years. As the depreciation overhead decreased, so would the need to wring profit from each component, which is good, because it's the leading-edge components that generate the most profits.
Although this strategy works well for a while, it is inherently self-defeating. By neglecting (or refusing) to upgrade a fab, a company is doomed to ride it into the ground. Eventually even the best process technology becomes so old that nothing it produces is saleable. Buggy whips, no matter how cheaply produced, just aren't in demand.
It is better to upgrade the fab at regular intervals, despite the expense. Paradoxically, this can be cheaper than letting it go. Newer process technologies inevitably shrink chip features, which reduces die size. A smaller die means more chips per wafer. More chips per wafer means more product to sell from the same amount of silicon. It is thus better to process 1,000 tiny chips than 350 larger ones. At the same time, each chip will get faster (because it's smaller) and more power-efficient (ditto). Whether these characteristics are valuable to your end market is irrelevant; you still get more chips per wafer than before. If you can charge extra for the smaller, faster, low-power chips, so much the better.
Economics of Larger Wafers
Semiconductor wafers have grown steadily in size over time, from the little 2-inch wafers of a few decades ago to the comparatively monstrous pizza-sized 300-mm (12-inch) wafers used in some high-end fabs today. By 2002, there were a few dozen fabs processing 300-mm wafers.
Apart from being more expensive in and of themselves, large wafers are more expensive to process. Like developing photographs into poster-sized prints, processing large wafers requires plenty of large-sized equipment. In a fab, nearly every piece of equipment at every stage of manufacturing has to be completely replaced to handle the new platters. What possible economic incentive is there to go through this trouble?
It's almost always more profitable to use the biggest wafers possible, that's why. There are direct and indirect effects that make bigger wafers appealing. First, the number of chips you can fit on a wafer increases with the square of its radius. In other words, 300-mm wafers don't just hold more chips; they hold a lot more chips. All other things being equal, a 200-mm wafer can produce 266 chips at 100 mm2 apiece, but a 300-mm wafer can hold 630 chips, well over twice as many chips for the same amount of work.
Second, the manufacturing equipment for 300-mm wafers is all brand new so it includes all the latest gadgets and gizmos for improving production efficiency. Transistor geometry gets smaller on the newer equipment, so more transistors fit on a chip, making each chip smaller. Much of the same effect could be had by replacing or refurbishing existing equipment, but if you're going to spend the money anyway, why not spend it on equipment that handles larger wafers, too? In effect, the ability to handle finer geometries on 300-mm equipment comes almost for free. Finer geometry means smaller chips, multiplying the beneficial effect of the larger wafer.
The cumulative effect of all this will increase the overhead burden, but will actually reduce the overhead burden per chip. Amortizing all the new fab equipment will still be a crushing burden, but you'll have a lot more chipsand more competitive chipswith which to do this.
Semiconductor manufacturing suffers from an odd economic condition that other industries don't share. Almost all the cost of producing a chip comes from fixed overhead, specifically in the depreciation of the fab and its equipment. Unlike boats or telephones, the incremental cost of producing each chip is almost nothing. The very first chip out the door is extraordinarily expensive. After that, the next million chips are practically free.
The only other industry that compares to this is, coincidentally, software. Most of the cost is in development; the cost of delivering software is almost zero. Music distribution and movie making come close, but there are some material costs (and enormous marketing costs) associated with those businesses. The strange economics of chip production puts direct pressure on manufacturers to increase volume. Depreciation directly burdens every chip; the more chips they make, the smaller the burden per chip. Producing twice as many chips means you can sell them for half the price.
The grimmer side of this equation means that slow-selling chips carry an enormous cost burden. Chip makers have to think long and hard before committing to produce a new chip. They can't afford to take too long, though, or the market might pass them by.
The ever-increasing cost to build a fab might mean that fewer and fewer companies each year will be able to afford this luxury. The alternative is not to fold the tent and leave the semiconductor industry; it's to outsource production to an independent foundry. Foundries are becoming an increasingly important part of the semiconductor production chain. The number of companies building their own fabs is slowly collapsing; with each new technology generation fewer and fewer companies are able to invest the capital required.
Separating the fabrication business from the design business leads to a horizontal segmentation of the industry. Chip companies become design-and-marketing companies, outsourcing their actual production to foundries. Further down the road, some firms might become just marketing companies. Already there are firms that do only chip design, with no fabrication or marketing.
The rising cost of fabs and the shrinking number of companies operating them will consolidate the number of "recipes" for making advanced silicon. Chip manufacturing will become more alike, almost generic. Companies will no longer be able to compete on the same basis they used to. Silicon speed and performance will be the same, if they all use the same third-party foundry. That will move the emphasis to marketing, where it already is for more mature products like cars and microwave ovens.
For 30 years the semiconductor market grew an average of 14.8 percent per year, from about $800 million in 1970 to $200 billion in 2000. Naturally, there were some good years and some bad years, but the overall trend was remarkably constant. During those same 30 years the cost of semiconductor capital equipment rose by 16.3 percent per year, a bit faster than the growth in sales. This means that spending on capital equipment grew from being 17 percent of a company's sales back in 1980 to a heftier 22 percent of sales in 2000. This ratio also fluctuates from year to year, going as high as 34 percent in 1996 to as low as 16 percent just three years later.
Yet paradoxically the cost of the chips themselves keeps falling. Each year sees higher productivity and better technology that more than make up for the spiraling cost of producing new chips. Chips are getting cheaper faster than they're getting more expensive.
If you're in the business of selling chips, though, you don't want them to get cheaper. To keep up profit margins, chip makers continually design more elaborate and expensive chips. By constantly moving up-market, chip makers neatly offset the inexorable trends moving them down-market. The result is that consumers keep getting more and more features for the same amount of money. There are few products in the world you can say that about.
If you focus on a few arbitrary units of semiconductor productionone transistor, 1 million bits of memory, one MIPS of microprocessor performance, or whateverand measure it over time, you'll see that the cost to make that unit has been falling at an exponential rate. As Figure 5.21 shows, the cost per unit function of semiconductor falls faster than the cost of semiconductor capital equipment rises.
Figure 5.21 The cost to manufacture a unit function of semiconductors falls faster than the cost of semiconductor equipment rises. Courtesy of IC Knowledge. Used with permission.
How do semiconductor makers reduce their costs so rapidly? There's no one silver bullet; it's a number of related technologies. Figure 5.22 shows the cumulative effect of larger wafers, finer process geometry, improvements in yield (lower defect density), and various other factors that drive down the cost to make a chip. Wafer sizes aren't increasing as often as they used to, so this effect is slowing down. On the other hand, process geometries shrink more frequently than they used to, neatly making up the difference.
Figure 5.22 Sources of the ever-declining cost of price-per-function. Courtesy of IC Knowledge. Used with permission.
This overall trend is popularly known as Moore's Law, the observation that we seem to be able to double the number of transistors packed into a given amount of silicon every 18 months. A two times return in 18 months works out to nearly 59 percent annual percentage rate: not a bad investment at all.
This is good news for manufacturers but even better news for consumers. The price (as opposed to the cost) for a unit function of semiconductor falls an average of 35 percent per year. Producing the same chip year after year will produce a steadily diminishing return on investment, so chip makers relentlessly improve their products. They add features to shore up the steadily shrinking die size, and then raise prices to cover the new features. In the end, consumers get more silicon goodness for their dollar.
For all-electronic products such as PCs and VCRs, a new and improved version comes along to replace the old one several times per year, something that would be unimaginable for more mature products like cars, refrigerators, or washing machines. Last year's top-of-the-line PC is this year's budget PC. A few months later, that same PC isn't worth selling at all. This constant upgrade treadmill means consumers always get the latest technology at the best price, but it also means rapid obsolescence. Electronic products have become disposable by their nature.
It's been said, "Speed, not yield, differentiates the leaders." Because prices spiral downward all the time, it's important to be early to market and enjoy the higher chip prices while you can, even if you pay for it in lower yields. By the time you've got your yield up to where you want it, market prices have eroded so much that the chip is barely profitable. Prices erode faster than yield improves. This race is for the swift.