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This chapter is from the book

This chapter is from the book

Intel Itanium and Itanium 2 Chipsets

Intel's first 64-bit server processors are the Itanium and Itanium 2 processor families. The 64-bit architecture of these processors is a completely different architecture than the 32-bit or x64 extensions to 32-bit processor architectures supported by the Intel Pentium series and AMD Athlon series. (See Chapter 2 for more information.)

Intel's first chipset for the Itanium, the 460GX, was introduced in June 2001, coinciding with the initial release of the Itanium processor. The 460GX chipset included 10 components, enabling developers to customize Itanium systems for use as workstations with AGP4x graphics or as servers with up to four Itanium processors. The original Itanium was quickly replaced by the Itanium 2 because the Itanium's lengthy development time basically made it obsolete by the time it was delivered. The Itanium 2 offers faster clock speeds and larger memory caches than the original Itanium.

The current Intel Itanium 2 chipset is the E8870, which supports up to four Itanium 2 processors. When equipped with the E8870SP scalability port switch component, the E8870 supports up to eight Itanium 2 processors. The E8870 was introduced in August 2002.

The following sections provide detailed information about these chipsets.

The Intel 460GX Chipset for Itanium

The Intel 460GX chipset, the first (and only) chipset developed by Intel for the first-generation Itanium processor, was scarcely a chipset in the established sense of the term. Instead of using a relatively small number of versatile chips, the Intel 460GX seemed to use a different chip for almost every significant task performed outside the processor. As a result, the 460GX chipset includes a total of 10 components:

  • 82461GX— The System Address Controller (SAC) interfaced memory and control lines between memory and the Itanium processors via the MAC chips.
  • 82462GX— The System Data Path Controller (SDC) interfaced data lines between memory and the Itanium processors via the MDC chips.
  • 82463GX— The Memory Address Controller (MAC) connected system memory to the SAC.
  • 82464GX— The Memory Data Controller (MDC) connected system memory to the SDC.
  • 82465GX— The Graphics Expansion Bus (GXB) provided an AGP 4x expansion slot (for workstation use).
  • 82466GX— The Wide and Fast PCI Expansion Bus (WXB) supported two independent 66MHz, 64-bit PCI interfaces to the SAC.
  • 82467GX— The PCI eXpander Bridge (PXB) provided two 32-bit, 33MHz PCI interfaces or a single 64-bit, 33MHz PCI interface to the SAC.
  • 82468GX— The I/O and Firmware Bridge (IFB) provided a PCI-to-ISA bridge, USB ports, the interface to the FWH, the interface to the Super I/O chip, and other support functions. It connected to the PXB.
  • 82802AC— The Firmware Hub (FWH) stored firmware (BIOS) and security features. It connected to the IFB.
  • 82094AA— The Programmable Interrupt Device (PID) was an interrupt controller with steering capabilities. It was actually an NEC-developed part (NEC #UPD66566S1-016).

Figure 3.21 illustrates the architecture of a four-way system using the 460GX chipset.


Figure 3.21 The 460GX used many single-purpose chips instead of highly integrated chips to support the original Itanium processor.

Very few servers were built using the Itanium processor or the 460GX chipset. However, the 460GX chipset is significant for being the most complex Intel chipset to date.

The Intel E8870 Chipset for Itanium 2

The Itanium 2 processor rapidly replaced the original Itanium processor, and because of major changes in its design, a brand-new chipset was needed. The E8870 was introduced at the same time as the Itanium 2, and it continues to be Intel's only Itanium 2–compatible chipset. (Other vendors have also produced Itanium 2 chipsets.)

Unlike the 460GX, the E8870 (also known as the 870) uses Intel's modern hub architecture along with specialized support chips. The E8870's components include the following:

  • E8870— The Scalable Node Controller (SNC) provides memory controller and system bus interfacing services. It can be connected to the SPS for scaling to dual-node (eight-way) implementations, or it can connect to the SIOH for single-node (four-way and smaller) implementations. It receives DDR memory signals through connections to DMH chips.
  • E8870DM— The DDR Memory Hub (DMH) translates two DDR channels into the native quad-channel Rambus memory bus on the SNC.
  • E8870IO— The Server Input/Output Hub (SIOH) provides an HI 1.5 (266Mbps) connection to the ICH4 and provides dual HI 2.0 (1Gbps) connections to the P64H2 PCI-X bridges.
  • 82870P2— The 64-bit PCI/PCI-X Controller (P64H2) supports 64-bit PCI-X slots running at 133MHz. (PCI-X also supports PCI devices.) It can be used to support Intel Gigabit Ethernet and Intel I/O processor chips.
  • 82801DB— The ICH (ICH4) supports USB 2.0, ATA/IDE, and other legacy ports.
  • 80802AC— The Firmware Hub (FWH) supports BIOS and security features.

These components are used in four-way Itanium implementations; each four-way implementation is known as a node. However, an additional component, known as the E8870SP, the Scalability Port Switch (SPS), is used to connect two nodes into an eight-way implementation. The SPS was introduced after the initial release of the E8870 chipset.

Figure 3.22 illustrates the architecture of a typical four-way Itanium 2 system using the E8870, and Figure 3.23 illustrates how the SPS is used to enable eight-way processing.


Figure 3.22 The E8870's architecture in a typical four-way implementation.


Figure 3.23 The E8870's architecture when SPS chips are used to create a two-node (eight-way) system. Note that one SPS chip is used for each node.

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