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This chapter is from the book

1.10 CONCLUDING REMARKS

In this book we study a wide diversity of techniques used for improving manufacturing yield and field-related fault tolerance and reliability of static and dynamic RAMs. We first describe algorithms for fault diagnosis, memory repair and recon-figuration in Chapter 2. In Chapter 3 we examine the impact of radiation-induced single-event effects on memory devices. Such effects cause both soft and hard errors, and mitigation techniques for such errors ranging from process and circuit hardening techniques to use of error-correcting codes are described. Chapter 4 is dedicated to a description of the theory and implementation of error-correcting circuitry (ECC). Chapter 5 covers the statistical modeling of manufacturing yield, factors affecting yield, ways to predict yield, relationship between yield and reliability, and yield management techniques. In Chapter 6 we describe a complete solution for yield and reliability improvement of RAMs employing BISR – the solution described comprises circuit and layout techniques that guarantee high yield and reliability, and low cost. A silicon compiler, BISRAMGEN, for built-in self-repairable static RAM layout generation has been critically examined to understand the circuit and physical design concepts that are important for embedded high-performance SRAMs. The literature reviewed in this book spans the last 20 years of research done in this field and has been updated to include the latest circuit and processing techniques.

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