23.2 Architecture Flow and Interconnect Diagrams
To build architecture flow diagrams, we must identify architecture modules and allocate functional and control processing to them. Figure 23.2 shows a generic DFD/CFD/CSPEC. Assume that we will allocate the processes from the DFD to two modules: processes 1 and 2 to one module, and processes 3 and 4 to the other. This allocation decision is based only on the data processing functions, not on the control processing. In allocating the latter, one option is to divide it to correspond exactly with the allocation of the data processing.
Figure 23.2. Generic DFD/CFD/CSPEC.
We have specified data and control processing, PSPECs, and CSPECs in the requirements model and can ask the following questions:
- First, does any one module clearly dominate the control of the system’s behavior?
- Second, should any data processes be duplicated in more than one module to satisfy the control requirements as well as the technology decisions?
- Third, should all modules contain the control necessary to be self-sufficient? That is, should each module contain the CFD control signals and those parts of the corresponding CSPECs such that it can make its own process activation and deactivation decisions?
If the answer to the third question is Yes, then the simple allocation discussed above applies, but affirmative answers to the first and second questions can produce a different result. If one module, say module 2, is the controller, then we want to assign it overall control of the system, and would allocate CSPEC 0 to it. We still need to control the functions of module 3, so several additional control signals would be created to flow between module 2 and module 3. This results in a split process activation table, which we discussed in Section 19.1.
In general, the allocation process requires looking at both data and control processing from the requirements model, making design decisions, making the allocations based on those decisions, evaluating the design decisions and allocations, and, usually, iterating through the whole process again.
With regard to the order in which the AFD and AID should be drawn, there may be some advantage in drawing the AFD first since that is where the requirements model is mapped into the architecture modules. However, as long as both the AFD and AID are produced as end products, either order will do. In most circumstances, the allocation is to be decided first (hence, the AFD would be created first). But in some instances, the allocation of functions depends on the information flow channel bus loading, which requires creation of the AID first.