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Pearson eText for Computer Organization and Architecture -- Access Code Card, 11th Edition

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Pearson eText for Computer Organization and Architecture -- Access Code Card, 11th Edition


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Comprehensive coverage spans the entire computer design field

  • Utilizes a top down approach—computer system, processor, control unit— for clarity and ease of use. The objective is to present the material in a fashion that keeps new material in a clear context.
  • Systems are viewed from both the architectural and organizational structure perspectives to help students gain a comprehensive overview of computer design.
  • A unified treatment of I/O provides a full understanding of I/O functions and structures, including discussions of DMA, direct cache access, and external interfaces.
  • A focus on multicore gives students a broad understanding of this technology, found in virtually all contemporary machines.
  • A thorough discussion of instruction sets, including a new chapter on assembly language.
  • Detailed use of specific examples throughout the book to illustrate concepts, including Intel x86, ARM embedded system architecture, and IBM z13 mainframe.

Hands-on experience reinforce concepts from the text

  • Homework problems, case studies, and additional student resources enhance their understanding of the material.
  • Projects and other student exercises are richly supported with a variety of research, simulation, and assembly language projects that instructors can use to tailor a course plan.
  • Over 20 interactive simulations illustrate computer architecture design issues, providing a powerful tool for understanding the complex design features of a modern computer system.

Chapter updates keep the text current

  • Several chapters and discussions have been revised for the 11th Edition, including:
    • New - A discussion of multichip modules (MCMs), has been added to Chapter 1.
    • Updated - Updated treatment of SPEC benchmarks in Chapter 2 covers the new SPEC CPU2017 benchmark suite.
    • New - A chapter on memory hierarchy expands on material that was in the cache memory chapter and adds expanded coverage of both the principle of locality and the memory hierarchy.
    • Revised - The cache memory chapter (Chapter 5) now includes expanded treatment of logical cache organization, including new figures, to improve overall clarity.
    • New - Coverage of content-addressable memory, write allocate, and no write allocate policies have been added to Chapter 5.
    • New - A section on the increasingly popular Embedded DRAM, or eDRAM, is included in Chapter 6.

Check out the preface for a complete list of features and what's new in this edition.


  • Copyright 2019
  • Pages: 884
  • Edition: 11th
  • Book
  • ISBN-10: 0-13-518897-0
  • ISBN-13: 978-0-13-518897-2

For graduate and undergraduate courses in computer science, computer engineering, and electrical engineering.

Comprehensively covers processor and computer design fundamentals

Computer Organization and Architecture, 11th Edition is about the structure and function of computers. Its purpose is to present, as clearly and completely as possible, the nature and characteristics of modern-day computer systems. Written in a clear, concise, and engaging style, author William Stallings provides a thorough discussion of the fundamentals of computer organization and architecture and relates these to contemporary design issues. Subjects such as I/O functions and structures, RISC, and parallel processors are thoroughly explored alongside real-world examples that enhance the text and build interest. Incorporating brand-new material and strengthened pedagogy, the 11th Edition keeps readers up to date with recent innovations and improvements in the field of computer organization and architecture
This title is a Pearson eText, an affordable, simple-to-use, mobile reading experience that lets instructors and students extend learning beyond class time. Students can study, highlight, and take notes in their Pearson eText on Android and iPhone mobile phones and tablets — even when they are offline. Access to this eText can be purchased using an access code card or directly online once the instructor creates a course. Learn more about Pearson eText.

Sample Content

Table of Contents

I. Introduction

1. Basic Concepts and Computer Evolution

2. Performance Concepts

II. The Computer System

3. A Top-Level View of Computer Function and Interconnection

4. The Memory Hierarchy: Locality and Performance

5. Cache Memory

6. Internal Memory

7. External Memory

8. Input/Output

9. Operating System Support

III. Arithmetic and Logic

10. Number Systems

11. Computer Arithmetic

12. Digital Logic

IV. Instruction Sets and Assembly Language

13. Instruction Sets: Characteristics and Functions

14. Instruction Sets: Addressing Modes and Formats

15. Assembly Language and Related Topics

V. The Central Processing Unit

16. Processor Structure and Function

17. Reduced Instruction Set Computers

18. Instruction-Level Parallelism and Superscalar Processors

19. Control Unit Operation and Microprogrammed Control

VI. Parallel Organization

20. Parallel Processing

21. Multicore Computers


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