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Digital Signal Processing Applications With Motorola's DSP56002 Processor

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Digital Signal Processing Applications With Motorola's DSP56002 Processor


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  • Introduces the operation of the DSP56002 digital signal processor, the DSP56000EVM Evaluation Module, and the DSP Assembler software.
  • Explains the DSP56002's processor architecture, addressing modes and instruction set.
  • Presents real-time digital signal processing routines and demonstrates their implementation.


  • Copyright 1997
  • Dimensions: 7" x 9-1/4"
  • Pages: 448
  • Edition: 1st
  • Book
  • ISBN-10: 0-13-569476-0
  • ISBN-13: 978-0-13-569476-3


Motorola's DSP56002 processor and its development tools provide an ideal environment for digital signal processing. This book explains and demonstrates how to use this processor to solve a number of common real-time signal processing problems. The text has three main sections. Part One covers the operation of the processor and its evaluation module (DSP56002EVM) and assembler. Part Two illustrates the architecture, addressing modes, and instruction set. Part Three takes on the specifics of digital signal processing, including the design and implementation of:

  • FIR and adaptive FIR filters
  • IIR filters
  • Fast Fourier Transforms
  • Appendices relate these concepts to their counterparts on Motorola's DSP56000 and DSP56001 processors.

This book is intended for use by both students and computer industry professionals. An associated MS DOS program, DSP56002 Demonstration Software, is recommended as an accompaniment to the text. The book includes an order coupon for this software.

Sample Content

Table of Contents

1. Introduction to the DSP56002 Digital Signal Processor and the DSP56002EVM Evaluation Module 1.

DSP56002 Processor General Description. DSP56002EVM Evaluation Module General Description. EVM Set Up. Installing the Software. Summary of Debug-EVM Commands. Basics of Some Debug-EVM Commands. Using the EVM to Program the DSP56002. Reference.

2. Introduction to MotorolaÕs DSP Assembler Program.

Installing the ASM56000 Assembler Software Program. Program Source Statement Format. Entering and Editing a Canned DSP56002 Program. Assembling a Canned DSP56002 Program. Program Development and Execution Using the Debug-EVM Software Program. Defining and Using Macros. References.

3. DSP56002 Architecture and Addressing Modes.

DSP56002 Architecture Review. How to Proceed. Data ALU Execution Unit. Program Controller. Address Generation Unit. Addressing Modes. Reference.

4. DSP56002 Instruction Set.

Instruction Format. Parallel-Move Operations. Parallel-Move Types. DSP56002 Instruction Set. Reference.

5. Introduction to Digital Signal Processing Systems.

DSP System. CS4215 Multimedia Audio Codec. DSP56002 Processor Port C. DSP56002 Interrupt Priority Register. Initialization Macro. Exercising the DSP System.

6. Designing FIR Filters and Implementing Them on the DSP56002 Processor.

FIR Filter Frequency Response. Relating a Practical FIR Filter to an Ideal FIR Filter. Specifying a Practical FIR Filter. Using the Window Method to Design a Practical FIR Filter. Using a Software Program to Design Practical FIR Filters. Implementing a FIR Filter. Digital Filter Design and Analysis System Software Program. FIR Filter Demonstration System. Implementing FIR Filters. References.

7. Designing IIR Filters and Implementing Them on the DSP56002 Processor.

IIR Filter Transfer Function. Review of the Bilinear Transformation. IIR Filter Specifications. Normalized Low-Pass Filter Design. Analog Filter Design. Digital Filter Design. Implementing a Biquad Section on the DSP56002 Processor. Implementing an IIR Filter. Digital Filter Design and Analysis System Package. DSP56002 Macro for Implementing an IIR Filter on the DSP System. IIR Filter Demonstration System. Designing and Implementing IIR Filters. Quantization Effects. References.

8. Implementing the Fast Fourier Transform with the DSP56002 Processor.

FFT Review. Running the DSP56002 Demonstration Software. FFT Implementation. References.

9. Designing Adaptive FIR Filters and Implementing Them on the DSP56002 Processor.

LMS Algorithm Review. Implementing an Adaptive FIR Filter on the DSP56002. Adaptive FIR Filter Demonstration System. Implementing an Adaptive FIR Filter on the Demonstration System. References.

Appendix A. DSP56001 Interface Techniques and Examples.

Interfacing MotorolaÕs DSP56001 to Pseudo Static RAM. Pseudo-Static RAM. A Simple Dynamic RAM Interface for the DSP56001. DRAM Basics. A Simple ISA Bus Interface for the DSP56001. Communicate with the DSP56000 Host Interface Using C Language. References.

Appendix B. Implementing IIR/FIR Filters with Motorola DSP56000/DSP6001.

Introduction. Second-Order Direct-Form IIR Digital Filter Sections. Single-Section Canonic Form (Direct Form II). Single-Section Transpose Form. Cascaded Direct Form. Filter Design and Analysis System. FIR Filters. References.

Appendix C. Implementation of Fast Fourier Transforms on Motorola Digital Signal Processors

Introduction to the Fourier Integral. The Discrete Fourier Transform. The Fast Fourier Transform. Complex FFT on the Motorola DSP Family. Optimizing Performance of the FFT. Real-Valued Input FFT Algorithm. Two Dimensional Fourier and Cosine Transforms. Competitive Analysis of FFT Performances. Conclusion. Fully Optimized Complex FFT. Real-Valued Input FFT. References.


DSP56002 Demonstration Software Order Form.


The objective of this book is to explain and demonstrate the operation of the DSP56002 Processor and its Development Tools, which are used to implement solutions to common real-time digital signal processing problems. This book is intended for use by both undergraduate and graduate engineering students, as well as industry professionals. It can be used, for example, in a one-semester, three-credit-hour digital signal processing projects course or in a laboratory course accompanying a first course in digital signal processing.

This book consists of three major parts. The first, including chapters 1 and 2, explains and demonstrates the operation of DSP56002 digital signal processor, the DSP56000EVM Evaluation Module (EVM), and the DSP Assembler Software program. The second part, including chapters 3 and 4, describes the DSP56002 processorÕs architecture, addressing modes, and instruction set and shows how they operate. The third part, which includes chapters 5, 6, 7, 8, and 9, explains, implements, and demonstrates common real-the digital signal processing routines.

This book is the result of the generous support of Motorola's Digital Signal Processor Division and its DSP University Support Program. In particular, I thank Jim George, Keith Essency, and Robert M. Bergeler of MotorolaÕs DSP for supporting the DSP laboratory at Purdue University. In addition, I thank Robert M. Bergeler for his significant efforts in carefully editing and revising the first draft of the book, helping to clarify my ideas. I also gratefully acknowledge my students for their commentary and assistance throughout my writing of the book. Finally, I thank Jerry Purcell, president and technical director of Momentum Data Systems Incorporated, for permission to describe the use of the Digital Filter Design and Analysis System program in the book.

The minimum hardware configuration to run the DSP56002 Development Tools and the DSP56002 Demonstration Software program is an IBM PC with:
A. 386 or 486 processor
B. 512 Kbytes of RAM
C. Hard drive
D. One RS-232 Port
E. 3.5" 1.44MB diskette drive
F. MS-DOS V3.0 or later

A highly recommended software program is available for use with this book. The DSP56002 Demonstration Software program includes all of the DSP56002 programs presented in the book. The program is sold for $25. Please complete the enclosed order form in the back of the book and mail it along with a check or money order to the address on the form.


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