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Handbook of Digital Techniques for High-Speed Design: Design Examples, Signaling and Memory Technologies, Fiber Optics, Modeling, and Simulation to Ensure Signal Integrity (paperback)

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Handbook of Digital Techniques for High-Speed Design: Design Examples, Signaling and Memory Technologies, Fiber Optics, Modeling, and Simulation to Ensure Signal Integrity (paperback)

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Description

  • Copyright 2004
  • Dimensions: 7" x 9-1/4"
  • Pages: 976
  • Edition: 1st
  • Book
  • ISBN-10: 0-13-376474-5
  • ISBN-13: 978-0-13-376474-1

Circuits, Devices andSystems Digital Techniques for High-SpeedDesign

TOM GRANBERG

High-speed digitaldesign—Complete, current, and practical

Practicing engineers whowork with high-speed digital designknow that a thorough, fully up-to-date resource is crucial for keeping pacewith rapidly changing technologies. Senior and graduate-level engineeringstudents need a similar resource, but with added introductory material andplenty of exercises. Only one book fills the need of both audiences—Handbookof Digital Techniques for High-Speed Design, by electronics expert TomGranberg.

This practical handbookcovers every aspect of board-level design, starting with the basics of designtrends, SerDes and bus technologies, and signal integrity. In-depth topics includememory technologies, fiber optics, modeling and simulation, design tools andthe design process, CML controlled-impedance drivers, differential andmixed-mode S-parameters, and the emerging protocols and technologies of RapidIOand PCI-Express. Tom Granberg also features major, detailed high-speed designexamples—including a BLVDS SerDes design and a design with highgigabit-per-second serial links using WarpLink devices.

This book

  • Provides detailed technical information on CML, SSTL, GTL/GTL+/GTLP, LVDS, Bus LVDS, M-LVDS, LVDM, ECL, PECL, LVPECL, HSTL, and more—plus applications best suited for each

  • Discusses IBIS and SPICE modeling and simulation, plus a full range of electronic design automation (EDA) tools

  • Emphasizes backplane and bus design with detailed guidelines and design rules

  • Covers fiber optics in detail—and when it makes sense to use them, and much more!

This book was written withtwo audiences in mind—practicing engineers who work with high-speeddigital electronics, and graduate and undergraduate-level students in collegesand universities who need to learn the concepts and techniques of high-speeddigital design before going to work in industry.

Sample Content

Table of Contents

Preface.

I. INTRODUCTION.

 1. Trends in High-Speed Design.


 2. ASICs, Backplane Configurations, and SerDes Technology.


 3. A Few Basics on Signal Integrity.


II. SIGNALING TECHNOLOGIES AND DEVICES.

 4. Gunning Transceiver Logic (GTL, GTLP, GTL+, AGTL+).
 5. Low Voltage Differential Signaling (LVDS).
 6. Bus LVDS (BLVDS), LVDS Multipoint (LVDM), and Multipoint LVDS (M-LVDS).
 7. High-Speed Transceiver Logic (HSTL) and Stub-Series Terminated Logic (SSTL).
 8. Emitter Coupled Logic (ECL, PECL, LVPECL, ECLinPS Lite and Plus, SiGe, ECL Pro, GigaPro and GigaComm).
 9. Current-Mode Logic (CML).
10. FPGAs - 3.125 Gbps RocketIOs and HardCopy Devices.
11. Fiber-Optic Components.
12. High-Speed Interconnects and Cabling.

III. HIGH-SPEED MEMORY AND MEMORY INTERFACES.

13. Memory Device Overview and Memory Signaling Technologies.
14. Double Data Rate SDRAM (DDR, DDR2) and SPICE Simulation.
15. GDDR3, ZBT, FCRAM, SigmaRAM, RLDRAM, DDR SRAM, Flash, FeRAM, and MRAM.
16. Quad Data Rate (QDR, QDRII) SRAM.
17. Direct Rambus DRAM (DRDRAM).
18. Xtreme Data Rate (XDR) DRAM, FlexPhase and ODR.

IV. MODELING, SIMULATION, AND EDA TOOLS.

19. Differential and Mixed-Mode SParameters.
20. Time Domain Reflectometry (TDR), Time Domain Transmission (TDT), and VNAs.
21. Modeling with IBIS.
22. Mentor Graphics - EDA Tools for High-Speed Design, Simulation, Verification, and Layout.

V. DESIGN CONCEPTS AND EXAMPLES.

23. Advances in Design, Modeling, Simulation, and Measurement Validation of High-Performance Board-to-Board 5-to-10 Gbps Interconnects.
Appendix 23A. Generalized N-Port, Mixed-Mode S-Parameters.
24. IBIS Modeling and Simulation of High-Speed Fiber-Optic Transceivers.
25. Designing with LVDS.
26. Designing to 10 Gbps Using SerDes Transceivers, Serializers, and Deserializers.
27. WarpLink SerDes System Design Example.

VI. EMERGING PROTOCOLS AND TECHNOLOGIES.

28. Electrical Optical Circuit Board (EOCB).
29. RapidIO.
30. PCI Express and ExpressCard.

VII. LAB AND TEST INSTRUMENTATION.

31. Electrical and Optical Test Equipment.
Acronyms.
References.
About the Author.

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