- CPU Wars, Part 3: Put Your Left ARM In
- Itanium (or, What Happens If We Add Another Few MBs of Cache?)
- The Obligatory x86 Segment
One of the most successful architectures in the world comes from a little British company. In the late 1980s, Acorn Computers wanted to ditch the old MOS Technology 6502 CPU that was the mainstay of its home computer line. Rather than move to 16-bit computing, Acorn jumped all the way to 32 bits. After evaluating the options, it decided that none of them was appropriate, and chose to design its own chip. The resulting Acorn RISC Machine (ARM) was a success, and Apple became interested in it for the Newton. The chip design branch was spun off as a joint venture with Apple, and called Advanced RISC Machines (to preserve the acronym).
Advanced RISC Machines eventually became simply "ARM Holdings" and stopped producing CPUs. Instead, ARM Holdings sold basic core designs that then were extended by other manufacturers. Texas Instruments, for example, produces a line of ARM chips with integrated digital signal processors (DSPs), which are very popular in a large number of embedded applications.
If you’re reading this article online, you probably own at least one device powered by an ARM CPU, despite the fact that we tend to forget how popular they are. On most days, I carry around two devices running ARM chips—one at 220 MHz and one at 250 MHz. One runs Symbian, the other Linux. Both are made by Nokia.
ARM instructions are quite unusual in that they’re almost all conditionals. Rather than using conditional jumps for execution, each instruction executes only if a condition flag is set. This approach allows the instruction stream to be a lot more deterministic, which helps a lot with instruction cache hits and with code density.
One of the ARM licensees was Digital Equipment Corporation (DEC), which produced the StrongARM, running at more than 200 MHz and drawing less than 1 W of power. This design was later transferred to Intel, for which owning a high-performance, low-power chip was quite a shock. Intel eventually ditched the StrongARM design, though (because it was based on an ARM design, it required Intel to pay royalties), and replaced StrongARM with its own ARM-compatible chip, the XScale. Unfortunately, XScale was even faster and didn’t draw much power, and this confused Intel’s management even more. So Intel sold XScale to Marvell Technology Group, and went back to producing x86 chips and trying to sell a third Itanium system.
The latest version of the XScale, the PXA3xx series, clocks at 624–806 MHz, although it’s expected to reach at least 1.25 GHz in the relatively near future. Unlike desktop processors, ARMs don’t tend to come with any floating-point hardware. This is less of an issue than a decade ago, since many floating-point-intensive operations are now offloaded to dedicated graphics hardware (even in PDAs). To make up for this lack, ARM chips often implement some extra instructions that assist in running languages such as Java. Such operations include things like automatic null-pointer and array-bounds checks.
The most exciting thing about ARM chips in 2007 is that they’re starting to get to the speed where they can be used as general-purpose computing engines for a large section of the market. The main activities that they’re unable to handle, such as HD video playback, can be run more power-efficiently by external graphics chips or on-die DSPs. A few Linux-based ARM devices are already on the market, and I expect this trend to continue. An ARM-based information appliance running a web browser, email client, and word processor would fit the needs of a significant proportion of the computer-buying public, and has the potential to be produced very cheaply, as the One Laptop Per Child (OLPC) project has shown.