- The Itanium Processor Family: Built on Two Impressive Legacies
- The Progress of Technology at Hewlett-Packard
- At the Start: The Wide Word Project
- Itanium as a New Processor Benchmark
- The Business Drivers Met by Itanium Processor Development
- Envisioning the Utilization of Itanium's Power
- In Summary
The Progress of Technology at Hewlett-Packard
As hard as it is to imagine today in the world of technology companies, dot-com blowouts and single product plays, Hewlett-Packard's first computer was introduced almost four decades ago. From this early generation of machinesthe 'Instrument Automator' and the general-purpose "alpha"the basic groundwork had been laid to develop the fledging operating system and system software, all of which had to run on a 16-bit-per-word, 8 kilobyte system.
The hardware for the "alpha" project became known commercially as the HP 3000, which targeted the general-purpose business market in the early 1970's. The demands of the nascent operating system increased with each successive rollout, and it was clear that to survive the memory on the machine had to be increased to meet throughput requirements. By the beginning of the next decade, the HP 3000 Series 44 had made the next big jump in processing power with a significant enhancement of the System Processing Unit (SPU) that supported up to 4 megabytes of memory. The pace of enhancements also picked up as memory doubled to eight megabytes, and the microcode that ran the computer began to be etched into the ROMs (Read Only Memory).
In the early 1960s, IBM had developed microcode to enable them to build different sized machines, all of which ran the same instruction set. This defined their successful System 360 family of machines. However, as microcode was adopted by other manufacturers, machines were designed in which the microcode became more arcane and voluminous. For the complexity of their mainframe systems, it's estimated that IBM employed somewhat over 300,000 bits of microcode.
A subsequent increase in microcode size occurred in the Digital Equipment Corporation VAX machines. VAX systems contained about 550,000 bits of microcode. This was followed by even more extensive microcode in the X86 machines based on Intel's microcomputer architecture that launched the personal computer revolution. The machine that steadily advanced personal computing by putting machines onto every office desk used around 800,000 bits of microcode. And computer complexity still continued to grow. It was the shift to the RISC architecture concepts that obviated the need for microcode and eliminated microcode complexity on the grand scale.
Following the success of the initial RISC-based machines, the first superscalar and out-of-order superscalar implementations began to be developed for RISC processors. The first superscalar RISC system, the IBM RS/6000, was introduced in the early 1990's. HP and others subsequently developed out of order superscalar implementations for their RISC architectures. Most of the RISC implementation techniques were later applied internally within the evolving X86 machines. Yet here again, hardware complexity was creeping back into the picture as the limits of these architectures were approached. All of the major RISC and X86 manufacturers have found that continued performance improvements are becoming more difficult and expensive to achieve.